Scalable fabrication techniques and circuit packaging devices

Patent metadata

Field	Value
Publication number	US-2016330837-A1
Application number	US-201415105350-A
Country	US
Kind code	A1
Filing date	Dec 19, 2014
Priority date	Dec 19, 2013
Publication date	Nov 10, 2016
Grant date	—

Abstract

Disclosed are highly scalable fabrication methods for producing electronic circuits, devices, and systems. In one aspect, a fabrication method includes attaching an electronic component at a location on a substrate including a flexible and electrically insulative material; forming a template to encase the electronic component by depositing a material in a phase to conform on the surfaces of the electronic component and the substrate, and causing the material to change to solid form; and producing a circuit or electronic device by forming openings in the substrate to expose conductive portions of the electronic component, creating electrical interconnections coupled to at least some of the conductive portions in a selected arrangement on the substrate, and depositing a layer of an electrically insulative and flexible material over the electrical interconnections on the substrate to form a flexible base of the circuit, in which the produced circuit or electronic device is encased.

First claim

What is claimed is:

1 . A method to fabricate a circuit or electronic device, comprising:
attaching an electronic component at a location on a substrate including a flexible and electrically insulative material, wherein the substrate includes a flat surface opposite to that which the electronic component is attached; forming a template to encase the electronic component attached to the substrate by depositing a material in a phase to conform on the surfaces of the electronic component and the substrate, and causing the material to change to a solid form; and producing the circuit or electronic device by forming openings in the substrate to expose conductive portions of the electronic component, creating electrical interconnections coupled to at least some of the conductive portions in a particular arrangement on the substrate, and depositing a layer of an electrically insulative and flexible material over the electrical interconnections on the substrate to form a flexible base of the circuit, wherein the produced circuit or electronic device is encased in the template.

2 . The method as in claim 1 , wherein the electronic component includes a circuit element, a circuit, or a microchip.

3 . The method as in claim 2 , wherein the conductive portions includes contact pads of the circuit or the microchip.

4 . The method as in claim 2 , wherein the microchip includes a bare die microchip or a thin film microchip.

5 . The method as in claim 2 , wherein the circuit includes an integrated circuit, a thin film circuit, a sensor circuit, a transducer circuit, an amplifier circuit, a power converter circuit, or an optocoupler circuit.

6 . The method as in claim 2 , wherein the circuit element includes a diode, a light-emitting diode (LED), a transistor, a battery, or an impedance element.

7 . The method as in claim 1 , wherein the attached electronic component includes electronic components attached at predetermined locations based on a design of the produced circuit or electronic device.

8 . The method as in claim 1 , wherein the template includes a flat base surface that is the surface opposite to that which the electronic component is encased.

9 . The method as in claim 1 , wherein the attaching the electronic component on the substrate includes orienting the electronic component such that the conductive portions of the electronic component are in contact with the substrate.

10 . The method as in claim 1 , further comprising:
placing the substrate having the electronic component attached thereon in a well that includes an area greater than that of the substrate and includes a height equal to or greater than a combined height of the electronic component attached on the substrate, wherein the placement is oriented such that the substrate is at the bottom of the well and the electronic component is facing the opening of the well.

11 . The method as in claim 10 , wherein the forming the template includes applying an upper substrate having a flat surface against the deposited material in the phase to conform to the surfaces to produce a flat surface of the template in the solid form.

12 . The method as in claim 11 , further comprising:
removing, from the well, the template that encases the electronic component attached to the substrate; and placing the template that encases the electronic component on a flat surface oriented such that the substrate is upward and the template is in contact with the flat surface.

13 . The method as in claim 1 , wherein the forming the template includes first depositing the material in the phase to conform to the surfaces on an external surface or in a well, and submerging the electronic component attached on the substrate into the deposited material such that the material conforms on the surfaces of the electronic component.

14 . The method as in claim 1 , wherein the flexible and electrically insulative material includes polyimide, silicone-base elastomers, benzocyclobutane (BCB), SU-8, or elastomer containing additive conductive particles including carbon particles, carbon nanotubes, or Si nanowires.

15 . The method as in claim 1 , further comprising:
depositing an additional adhesion layer on the substrate prior to the attaching of the electronic component on the substrate.

16 . The method as in claim 1 , further comprising:
releasing the produced circuit or electronic device from the template.

17 . The method as in claim 16 , further comprising:
integrating the produced circuit or electronic device to a printed circuit board.

18 . The method as in claim 16 , further comprising:
forming an outer substrate including an electrically insulative material over the produced circuit or electronic device on the side having the electronic component.

19 . The method as in claim 16 , further comprising:
fabricating another circuit or electronic device using the released template, wherein the template includes a cavity formed by the electronic component from the template forming process, and wherein the fabricating another circuit or electronic device includes:
placing an electronic component in the cavity of the template;
forming a substrate including a flexible and electrically insulative material over a receiving surface of the template including the electronic component placed in the cavity to attach the electronic component to the substrate, wherein the substrate includes a flat surface opposite to that which the electronic component is attached; and
producing the another circuit or electronic device by forming openings in the substrate to expose conductive portions of the electronic component, creating electrical interconnections coupled to at least some of the conductive portions in a particular arrangement on the substrate, and depositing a layer of an electrically insulative and flexible material over the electrical interconnections on the substrate to form a flexible base of the circuit, wherein the another produced circuit or electronic device is encased in the template and capable of being released from the template.

20 . The method as in claim 1 , further comprising:
integrating the template-encased circuit or electronic device to a printed circuit board.

21 . The method as in claim 1 , wherein the producing the circuit or electronic device further includes fabricating electronic elements on the substrate, and creating additional electrical interconnections to electrically couple the electronic elements with the electronic component or the electrical interconnections.

22 . The method as in claim 21 , wherein the electronic elements include a diode, a light-emitting diode (LED), a transistor, a battery, an impedance element, an integrated circuit, a thin film circuit, a sensor, a transducer, an amplifier, a power converter, an optocoupler, or a microchip.

23 . An electronic device packaging, comprising:
a substrate including a flexible and electrically insulative material, the substrate structured to adhere one or more electronic components on a side of the substrate and to include openings spanning from the side into an interior region of the substrate, wherein the openings are arranged to align to locations where conductive contacts of the one or more electronic components are designed to be positioned; and interconnection wires including an electrically conductive material, the interconnection wires disposed in the openings and the interior region of the substrate in a p

Assignees

• Univ California

Inventors

• Coleman Todd Prentice
• Kim Yun Soung
• Bajema Michael
• Weinreb Robert N

Classifications

• H10W90/10

  Configurations of laterally-adjacent chips · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W70/654

  Top-view layouts · CPC title

• H10W70/60

  Insulating or insulated package substrates; Interposers; Redistribution layers (leadframes H10W70/40) · CPC title

• H10W74/01

  Manufacture or treatment · CPC title