Communication apparatus, demodulation apparatus, carrier reproduction apparatus, phase error compensation apparatus, phase error compensation method, and storage medium on which phase error compensation program has been stored

US2016330064A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016330064-A1
Application numberUS-201515110451-A
CountryUS
Kind codeA1
Filing dateJan 15, 2015
Priority dateJan 16, 2014
Publication dateNov 10, 2016
Grant date

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Abstract

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To enable a large-capacity, high-quality data communication that is excellent in bit error rate characteristic even in an adverse noise environment mainly caused by phase noises or thermal noises. [Solution] Included are: a first phase error detection filter that generates, on the basis of a forward sequence of received symbols, a first phase difference value and a first phase error estimated value; a second phase error detection filter that generates, on the basis of a backward sequence of received symbols, a second phase difference value and a second phase error estimated value; a phase error combination means that generates a third phase error estimated value on the basis of the first and second phase error estimated values and one of the first and second phase difference values; and a phase error compensation means that compensates the phase error of the received symbols in accordance with the third phase error estimated value.

First claim

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1 . A phase error compensation apparatus comprising: a first phase error detection filter which generates a first phase difference value and a first phase error estimation value on the basis of received symbols in a forward sequence; a second phase error detection filter which generates a second phase difference value and a second phase error estimation value on the basis of the received symbols in a reverse sequence; a phase error combination unit which generates a third phase error estimation value on the basis of the first phase error estimation value and the second phase error estimation value, and one of the first phase difference value and the second phase difference value; and a phase error compensation unit which compensates a phase error in the received symbols in association with the third phase error estimation value. 2 . The phase error compensation apparatus according to claim 1 , further comprising: a parameter generation unit which generates a coefficient to be used by the first phase error detection filter, the second phase error detection filter and the phase error combination unit. 3 . The phase error compensation apparatus according to claim 1 , wherein the first phase error detection filter and the second phase error detection filter include: a determination unit which calculates transmitted symbols closest to received symbols whose phase is compensated; a phase detection unit which calculates a phase difference value between the calculated transmitted symbols and the received symbols whose phase is compensated; a one-tap filter which removes a high frequency component included in an output of the phase detection unit with use of a tap coefficient calculated on the basis of a phase noise parameter of a reference oscillator and a signal-to-noise ratio; a cumulative adder unit which calculates an estimated value of phase error generated in the received symbols caused by phase noise on the basis of an output of the one-tap filter, with use of a feedback coefficient calculated on the basis of the phase noise parameter of the reference oscillator and the signal-to-noise ratio; a data conversion unit which converts the estimated value of phase error into phase compensation data of received symbols; and a multiplier which compensates a phase of received symbols by an output of the data conversion unit. 4 . The phase error compensation apparatus according to claim 3 , wherein the phase detection unit in the first phase error detection filter and in the second phase error detection filter calculates a phase difference value between one of symbols selected from the transmitted symbols, and symbols for phase reference; and the received symbols whose phase is compensated, the symbols for phase reference being obtained by inverse conversion of demodulated data, the demodulated data being converted on the basis of received symbols whose phase error is compensated. 5 . The phase error compensation apparatus according to claim 1 , wherein the phase error combination unit includes; a first adder which adds the first phase error estimation value and the second phase error estimation value; a second multiplier which multiplies a first multiplication coefficient calculated from a phase noise parameter of a reference oscillator and from a signal-to-noise ratio with an addition result of the adder; a third multiplier which multiplies a second multiplication coefficient calculated from the phase noise parameter of the reference oscillator and from the signal-to-noise ratio with one of the first phase difference value and the second phase difference value; and a second adder which sets a result of addition of the multiplication result of the second multiplier and the multiplication result of the third multiplier, as the third phase error estimation value generated in a phase of received symbols caused by phase noise. 6 . A carrier reproduction apparatus comprising: the phase error compensation apparatus including; a first phase error detection filter which generates a first phase difference value and a first phase error estimation value on the basis of received symbols in a forward sequence; a second phase error detection filter which generates a second phase difference value and a second phase error estimation value on the basis of the received symbols in a reverse sequence; a phase error combination unit which generates a third phase error estimation value on the basis of the first phase error estimation value and the second phase error estimation value, and one of the first phase difference value and the second phase difference value; and a phase error compensation unit which compensates a phase error in the received symbols in association with the third phase error estimation value; a symbol demapping unit which demaps received symbols whose phase error is compensated by the phase error compensation apparatus; and an error correction decoding unit which corrects an error included in the received symbols whose phase error is compensated on the basis of an output of the symbol demapping unit, and outputs demodulated data. 7 . (canceled) 8 . (canceled) 9 . A phase error compensation method comprising: generating a sequence of phase difference values φ( 1 ), φ( 2 ), . . . , φ(M) (where M is a positive integer) between a sequence of received symbols and a sequence of reference symbols; successively calculating first phase error estimation values θ + ( 1 ), θ + ( 2 ), . . . , θ + (M), θ + (M+1) caused by phase noise included in the sequence of phase difference values on the basis of the sequence of phase difference values; successively calculating second phase error estimation values θ − (M), θ − (M−1), . . . , θ − ( 1 ) on the basis of the sequence of phase difference values φ(M), φ(M−1), . . . , φ( 1 ) by setting θ + (M+1) as an initial value; calculating third phase error estimation values θ ± ( 1 ), θ ± ( 2 ), . . . , θ ± (M) by linear computation of the first phase error estimation values θ + ( 1 ), θ + ( 2 ), . . . , θ + (M), the second phase error estimation values θ − ( 1 ), θ − ( 2 ), . . . , θ − (M), and the phase difference values φ( 1 ), φ( 2 ), . . . , φ(M); successively calculating the first phase error estimation values, the second phase error estimation values, and the third phase error estimation values included in phase difference values φ(kM+1), φ(kM+2), . . . , φ((k+1)M) regarding a positive integer k by the calculation processes; and compensating a phase error by subtracting the third phase error estimation values θ ± (kM+1), θ ± (kM+2), . . . , θ ± ((k+1)M) from the phase difference values φ(kM+1), φ(kM+2), . . . , φ((k+1)M). 10 . (canceled)

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Classifications

  • Compensation for phase rotation in the demodulated signal · CPC title

  • Phase error detectors · CPC title

  • Carrier regulation (of chaotic carriers H04L27/001; for multicarrier receivers H04L27/2657) · CPC title

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What does patent US2016330064A1 cover?
To enable a large-capacity, high-quality data communication that is excellent in bit error rate characteristic even in an adverse noise environment mainly caused by phase noises or thermal noises. [Solution] Included are: a first phase error detection filter that generates, on the basis of a forward sequence of received symbols, a first phase difference value and a first phase error estimated v…
Who is the assignee on this patent?
Nec Corp
What technology area does this patent fall under?
Primary CPC classification H04L27/3872. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Nov 10 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).