Shift register, driving method, gate driving circuit and display device

US2016328045A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016328045-A1
Application numberUS-201514850536-A
CountryUS
Kind codeA1
Filing dateSep 10, 2015
Priority dateMay 8, 2015
Publication dateNov 10, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A shift register, a driving method, a gate driving circuit and a display device are provided. The shift register includes a scan control module, an output module, a pull-down module, a turn-off restoring module and a touch control module. The turn-off restoring module is electronically connected to the scan control module at a first node and electronically connected to the touch control module and the output module at a second node. The turn-off restoring module controls the first node to be electrically insulated from the second node during a touch scan phase, and restores a potential of the second node to a potential at a time instant before the touch scan phase when the touch scan phase is finished. The touch control module controls the output module to output a touch scan signal to an output terminal of the shift register during the touch scan phase.

First claim

Opening claim text (preview).

What is claimed is: 1 . A shift register, comprising a scan control module, an output module, a pull-down module, a turn-off restoring module and a touch control module, wherein the turn-off restoring module is electronically connected to the scan control module at a first node, and is electronically connected to the touch control module and the output module at a second node; and the turn-off restoring module is configured to, control the first node to be electrically insulated from the second node during a touch scan phase, and restore a potential of the second node to a potential of the second node at a time instant before the touch scan phase according to a potential of the first node when the touch scan phase is finished; and the touch control module is configured to control the output module to output a touch scan signal to an output terminal of the shift register during the touch scan phase. 2 . The shift register of claim 1 , wherein during a display scan phase, the turn-off restoring module is configured to control the first node to be electronically connected with the second node, and the first node has a same potential as the second node. 3 . The shift register of claim 2 , wherein the turn-off restoring module comprises a first sub-module and a second sub-module, wherein the first sub-module is configured to control the first node to be electrically insulated from the second node during the touch scan phase, and control the first node to be electronically connected with the second node during the display scan phase; and the second sub-module is configured to restores, when the touch scan phase is finished, the potential of the second node to the potential of the second node at the time instant before the touch scan phase according to the potential of the first node. 4 . The shift register of claim 3 , wherein the first sub-module comprises a first transistor, a second transistor, a first control signal terminal and a second control signal terminal; wherein a first terminal of the first transistor and a first terminal of the second transistor are both electronically connected to the first node, a second terminal of the first transistor and a second terminal of the second transistor are both electronically connected to the second node, a control terminal of the first transistor is electronically connected to the first control signal terminal, and a control terminal of the second transistor is electronically connected to the second control signal terminal. 5 . The shift register of claim 3 , wherein the second sub-module comprises a third transistor, a fourth transistor, a first capacitor, a third control signal terminal and a first level terminal; wherein a first terminal of the third transistor is electronically connected to a second terminal of the fourth transistor, a second terminal of the third transistor is electronically connected to the second node, a control terminal of the third transistor and a first plate of the first capacitor are both electronically connected to the third control signal terminal, a first terminal of the fourth transistor is electronically connected to the first level terminal, and a control terminal of the fourth transistor and a second plate of the first capacitor are both electronically connected to the first node. 6 . The shift register of claim 1 , wherein the touch control module comprises a fifth transistor, a fourth control signal terminal and a first signal terminal; wherein a first terminal of the fifth transistor is electronically connected to the first signal terminal, a second terminal of the fifth transistor is electronically connected to the second node, and a control terminal of the fifth transistor is electronically connected to the fourth control signal terminal. 7 . The shift register of claim 1 , wherein the scan control module comprises a sixth transistor, a seventh transistor, a second capacitor, a second signal terminal, a third signal terminal, a first input terminal and a second input terminal; wherein a first terminal of the sixth transistor is electronically connected to the second signal terminal; a second terminal of the sixth transistor, a second terminal of the seventh transistor and a first plate of the second capacitor are all electronically connected to the first node; a first terminal of the seventh transistor is electronically connected to the third signal terminal; a control terminal of the sixth transistor is electronically connected to the first input terminal; a control terminal of the seventh transistor is electronically connected to the second input terminal; and a second plate of the second capacitor is electronically connected to the output terminal of the shift register. 8 . The shift register of claim 4 , wherein the output module comprises an eighth transistor and a fourth signal terminal; wherein a first terminal of the eighth transistor is electronically connected to the fourth signal terminal, a second terminal of the eight transistor is electronically connected to the output terminal of the shift register, and a control terminal of the eighth transistor is electronically connected to the second node. 9 . The shift register of claim 8 , wherein the first control signal terminal and the fourth signal terminal are a same signal terminal, and the touch scan signal outputted from the fourth signal terminal is lower than a threshold voltage of the first transistor during the touch scan phase. 10 . The shift register of claim 8 , wherein the pull-down module comprises a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, a third capacitor, a fifth control signal terminal and a second level terminal; wherein a first terminal of the ninth transistor, a first terminal of the tenth transistor, a first terminal of the eleventh transistor, and a first terminal of the twelfth transistor are all electronically connected to the second level terminal; a second terminal of the ninth transistor and a control terminal of the tenth transistor are both electronically connected to the first node; a control terminal of the ninth transistor, a second terminal of the tenth transistor, a control terminal of the eleventh transistor and a second plate of the third capacitor are electronically connected to each other; and a first plate of the third capacitor is electronically connected to the fourth signal terminal; and a second terminal of the eleventh transistor and a second terminal of the twelfth transistor are both electronically connected to the output terminal of the shift register, and a control terminal of the twelfth transistor is electronically connected to the fifth control signal terminal. 11 . The shift register of claim 10 , wherein the first transistor, the second transistor and the twelfth transistor are of a same type, and the fifth control signal terminal and the second control signal terminal are a same signal terminal; and during the display scan phase, a clock signal outputted from the fifth control signal terminal and a clock signal outputted from the first control signal terminal are opposite. 12 . The shift register of claim 1 , further comprising a reset module, wherein the reset module is electronically connected to the first node and the output terminal of the shift register, and is configured to reset a potential of the first node and a potential of the output terminal of the shift register. 13 . The shift register of claim 12 , wherein the reset module comprises a thirteenth transistor, a fourteenth transistor, a sixth control signal terminal and a reset signal terminal; wherein a first terminal of the thirt

Assignees

Inventors

Classifications

  • G06F3/044Primary

    by capacitive means · CPC title

  • Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices · CPC title

  • G06F3/016Primary

    Input arrangements with force or tactile feedback as computer generated output to the user · CPC title

  • Digitisers structurally integrated in a display · CPC title

  • Details of drivers for scan electrodes · CPC title

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What does patent US2016328045A1 cover?
A shift register, a driving method, a gate driving circuit and a display device are provided. The shift register includes a scan control module, an output module, a pull-down module, a turn-off restoring module and a touch control module. The turn-off restoring module is electronically connected to the scan control module at a first node and electronically connected to the touch control module …
Who is the assignee on this patent?
Shanghai Tianma Microelectronics Co Ltd, Tianma Microelectronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/044. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Nov 10 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).