Display panel

Patent metadata

Field	Value
Publication number	US-2016321971-A1
Application number	US-201514647107-A
Country	US
Kind code	A1
Filing date	Jan 20, 2015
Priority date	Jan 21, 2014
Publication date	Nov 3, 2016
Grant date	—

Abstract

The present invention provides a display panel, which includes a plurality of scanning lines extending along a first direction, a plurality of data lines extending along a second direction and intersecting with the scanning lines, common electrode lines are disposed between two adjacent scanning lines and being parallel to the scanning lines, a wiring area covers the scanning lines, the data lines and the common electrode lines and a plurality of test pins for testing, pixel electrodes connected to corresponding data lines being disposed in each pixel cell, the pixel electrodes of the display pixels and the common electrode lines are separated and insulated, the pixel electrode of the virtual pixels being connected with the common electrode line by a connecting hole, the scanning lines, the data lines and the common electrode lines being connected respectively with a corresponding test pin by a connecting line in the wring area.

First claim

What is claimed is:

1 . A display panel, comprising a plurality of scanning lines extending along a first direction, a plurality of data lines extending along a second direction and intersecting with the scanning lines, common electrode lines being disposed between two adjacent scanning lines and being parallel to the scanning lines, a wiring area covering the scanning lines, the data lines and the common electrode lines and a plurality of test pins for testing, said scanning lines and said data lines define a plurality of pixel cells arranged in a matrix form, pixel electrodes connected to corresponding data lines being disposed in each pixel cell, said pixel cell comprising display pixels in the display area for displaying images and virtual pixels located at the edge of the display area, the pixel electrodes of the display pixels and the common electrode lines being separated and insulated from each other, said pixel electrode of the virtual pixels being connected with the common electrode line by a connecting hole, said scanning lines, said data lines and said common electrode lines being connected respectively with a corresponding test pin by a connecting line in the wring area.

2 . The display panel according to claim 1 , wherein said thin film transistor is disposed at the intersection of the scanning line and the data line in each pixel cell, the thin film transistor comprises a gate connected to the scanning line, a gate insulating layer is disposed on the gate, a semiconductor layer is disposed on the gate insulating layer, a source and a drain are electrically connected respectively to the source and the drain of the semiconductor layer and a passivation layer covers the source and the drain.

3 . The display panel according to claim 2 , wherein a concave hole is disposed between the source and the drain and extends inwardly until said semiconductor layer, the passivation layer is filled into the concave hole to insulate the source and the drain, an end of the source is connected to the data line, another end of the source is connected to the drain by the semiconductor layer, and an end of the drain opposing to the semiconductor layer is connected to the pixel electrode.

4 . The display panel according to claim 2 , wherein an ohmic contact layer is disposed between the source, the drain and the semiconductor layer.

5 . The display panel according to claim 2 , wherein connecting holes are provided on the gate insulating layer and the passivation layer which cover the common electrode lines in the virtual pixel to correspond to the common electrode line, the pixel electrode of the virtual pixel is connected to the common electrode by the connecting hole.

6 . The display panel according to claim 2 , wherein materials of the gate insulating layer and the passivation layer are silicon nitride compound, and material of the semiconductor layer is amorphous silicon.

7 . The display panel according to claim 1 , wherein the test pins comprise odd-numbered dummy scanning pins being connected to the scanning lines of the virtual pixels on odd-numbered rows, even-numbered dummy scanning pins being connected to the scanning lines of the virtual pixels on even-numbered rows, odd-numbered dummy data pins being connected to the data lines of the virtual pixels on odd-numbered columns, even-numbered dummy data pins being connected to the data lines of the virtual pixels on even-numbered columns, odd-numbered display scanning pins being connected to the scanning lines of the display pixels on odd-numbered rows, even-numbered display scanning pins being connected to the scanning lines of the display pixels on even-numbered rows, red data pins being connected to the data lines transmitting red display signals, green data pins being connected to the data lines transmitting green display signals, blue data pins being connected to the data lines transmitting blue display signals and common pins connecting to the common electrode lines.

8 . The display panel according to claim 2 , wherein the test pins comprise odd-numbered dummy scanning pins being connected to the scanning lines of the virtual pixels on odd-numbered rows, even-numbered dummy scanning pins being connected to the scanning lines of the virtual pixels on even-numbered rows, odd-numbered dummy data pins being connected to the data lines of the virtual pixels on odd-numbered columns, even-numbered dummy data pins being connected to the data lines of the virtual pixels on even-numbered columns, odd-numbered display scanning pins being connected to the scanning lines of the display pixels on odd-numbered rows, even-numbered display scanning pins being connected to the scanning lines of the display pixels on even-numbered rows, red data pins being connected to the data lines transmitting red display signals, green data pins being connected to the data lines transmitting green display signals, blue data pins being connected to the data lines transmitting blue display signals and common pins connecting to the common electrode lines.

9 . The display panel according to claim 3 , wherein the test pins comprise odd-numbered dummy scanning pins being connected to the scanning lines of the virtual pixels on odd-numbered rows, even-numbered dummy scanning pins being connected to the scanning lines of the virtual pixels on even-numbered rows, odd-numbered dummy data pins being connected to the data lines of the virtual pixels on odd-numbered columns, even-numbered dummy data pins being connected to the data lines of the virtual pixels on even-numbered columns, odd-numbered display scanning pins being connected to the scanning lines of the display pixels on odd-numbered rows, even-numbered display scanning pins being connected to the scanning lines of the display pixels on even-numbered rows, red data pins being connected to the data lines transmitting red display signals, green data pins being connected to the data lines transmitting green display signals, blue data pins being connected to the data lines transmitting blue display signals and common pins connecting to the common electrode lines.

10 . The display panel according to claim 4 , wherein the test pins comprise odd-numbered dummy scanning pins being connected to the scanning lines of the virtual pixels on odd-numbered rows, even-numbered dummy scanning pins being connected to the scanning lines of the virtual pixels on even-numbered rows, odd-numbered dummy data pins being connected to the data lines of the virtual pixels on odd-numbered columns, even-numbered dummy data pins being connected to the data lines of the virtual pixels on even-numbered columns, odd-numbered display scanning pins being connected to the scanning lines of the display pixels on odd-numbered rows, even-numbered display scanning pins being connected to the scanning lines of the display pixels on even-numbered rows, red data pins being connected to the data lines transmitting red display signals, green data pins being connected to the data lines transmitting green display signals, blue data pins being connected to the data lines transmitting blue display signals and common pins connecting to the common electrode lines.

11 . The display panel according to claim 5 , wherein the test pins comprise odd-numbered dummy scanning pins being connected to the scanning lines of the virtual pixels on odd-numbered rows, even-numbered dummy scanning pins being connected to the scanning lines of the virtual pixels on even-numbered rows, odd-numbered dummy data pins being connected to the data lines of the virtual pixels on odd-numbered columns, even-numbered dummy data pins being connected to the data lines of the virtual pixels on even-numbered columns, o

Assignees

• Shenzhen China Star Optoelect

Inventors

• Chai Li

Classifications

• G09G3/20 Primary

  for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters} · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• G09G3/006 Primary

  Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays (testing individual LED's G01R31/2635; testing lamps G01R31/44; testing of optical features of LCD displays G02F1/1309) · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title