Low drop out voltage regulator and method therefor

Patent metadata

Field	Value
Publication number	US-2016308497-A1
Application number	US-201514690896-A
Country	US
Kind code	A1
Filing date	Apr 20, 2015
Priority date	Apr 20, 2015
Publication date	Oct 20, 2016
Grant date	—

Abstract

A circuit and method for regulating an output voltage are provided. The circuit includes a fully differential first stage amplifier, a second stage amplifier, and a power output driver transistor. The first stage amplifier receives a reference voltage and feedback voltage relative to an output voltage of the power output driver transistor. A differential output of the first stage amplifier is received at differential inputs of the second stage amplifier. The second stage amplifier provides a voltage at a control terminal of the power transistor. The output voltage of the power transistor is based on the voltage at the control terminal and a supply voltage coupled to the power output driver transistor.

First claim

What is claimed is:

1 . A circuit comprising:
a first stage amplifier having a first input coupled to receive a reference voltage, a second input, a first output, and a second output; a second stage amplifier having a first input coupled to the first output of the first stage amplifier, a second input coupled to the second output of the first stage amplifier, and an output; a feed-forward amplifier having a first input coupled to receive the reference voltage, a second input, and an output coupled to the output of the second stage amplifier; a transistor having a control terminal coupled to the output of the second stage amplifier and to the output of the feed-forward amplifier, a first current terminal coupled to an output voltage terminal and a second current terminal coupled to a first voltage supply; a first resistive element having a first terminal coupled to the output voltage terminal and a second terminal coupled to the second input of the first stage amplifier and to the second input of the feed-forward amplifier; and a second resistive element having a first terminal coupled to the second terminal of the first resistive element and a second terminal coupled to a second voltage supply.

2 . The circuit of claim 1 , wherein the first stage amplifier is characterized as a fully differential operational amplifier having a differential input, a differential output, and a common-mode feedback circuit.

3 . The circuit of claim 2 , wherein the common-mode feedback circuit further comprises:
a first resistor having a first terminal and a second terminal, the first terminal coupled to the first output of the first stage amplifier; and a second resistor having a first terminal and a second terminal, the first terminal coupled to the second output of the first stage amplifier; wherein the second terminal of the first resistor is coupled to the second terminal of the second resistor and coupled to a current source in the output stage of the first stage amplifier.

4 . The circuit of claim 1 , wherein the second stage amplifier is characterized as a differential operational amplifier having a differential input and a single ended output.

5 . The circuit of claim 1 , further comprising a current load coupled between the output voltage terminal and the second voltage supply.

6 . The circuit of claim 1 , further comprising a capacitor having a first terminal coupled to the output voltage terminal and a second terminal coupled to the second voltage supply.

7 . The circuit of claim 1 , wherein the first voltage supply is characterized as a positive power supply voltage and the second voltage supply is characterized as ground.

8 . The circuit of claim 1 , wherein the feed-forward amplifier is characterized as an operational amplifier having a differential input and a single ended output.

9 . The circuit of claim 1 , wherein the second stage amplifier and the feed-forward amplifier share a common output stage.

10 . The circuit of claim 1 , wherein the transistor is a P-channel transistor.

11 . The circuit of claim 1 , further comprising a bias circuit for providing a bias voltage to the first stage amplifier, the second stage amplifier, and the feed-forward amplifier.

12 . The circuit of claim 1 , wherein the first resistive element includes a first plurality of series-connected resistors and the second resistive element includes a second plurality of series-connected resistors.

13 . A circuit comprising:
a first stage amplifier having a first input coupled to receive a reference voltage, a second input, a first output, and a second output; a second stage amplifier having a first input coupled to the first output of the first stage amplifier, a second input coupled to the second output of the first stage amplifier, and an output; a transistor having a control terminal coupled to the output of the second stage amplifier, a drain terminal coupled to an output voltage terminal and a source terminal coupled to a first voltage supply; a first resistive element having a first terminal coupled to the output voltage terminal and a second terminal coupled to the second input of the first stage amplifier; and a second resistive element having a first terminal coupled to the second terminal of the first resistive element and a second terminal coupled to a second voltage supply.

14 . The circuit of claim 13 , further comprising a feed-forward amplifier having a first input coupled to receive the reference voltage, a second input coupled to second terminal of the first resistive element, and an output coupled to the output of the second stage amplifier.

15 . The circuit of claim 14 , wherein a pole at the output of the first stage amplifier is compensated for by a left half plane zero determined by input transconductances of the first stage amplifier, the second stage amplifier, the feed-forward amplifier and a parasitic output impedance of the first output and the second output of the first stage amplifier.

16 . The circuit of claim 13 , wherein the first resistive element includes a first plurality of series-connected resistors and the second resistive element includes a second plurality of series-connected resistors.

17 . The circuit of claim 13 , wherein the first stage amplifier is characterized as a fully differential operational amplifier having a differential input, a differential output, and a common-mode feedback circuit.

18 . The circuit of claim 17 , wherein the common-mode feedback circuit further comprises:
a first resistor having a first terminal and a second terminal, the first terminal coupled to the first output of the first stage amplifier; and a second resistor having a first terminal and a second terminal, the first terminal coupled to the second output of the first stage amplifier; wherein the second terminal of the first resistor is coupled to the second terminal of the second resistor and coupled to a current source in the output stage of the first stage amplifier.

19 . A method of regulating an output voltage comprising:
receiving a reference voltage at a first input of a first stage amplifier, the first stage amplifier having a second input, and providing a differential output; receiving the differential output of the first stage amplifier at differential inputs of a second stage amplifier, the second stage amplifier providing a single-ended output voltage; receiving the second stage amplifier output voltage at a control terminal of a transistor, the transistor having a first terminal coupled to a first voltage supply and at a second terminal providing an output voltage based on the control terminal voltage and the first voltage supply; and feeding back a feedback voltage to the second input of the first stage amplifier, the feedback voltage being relative to the output voltage at the second terminal of the transistor.

20 . The method of claim 19 , further comprising:
receiving the reference voltage at a first input of a feed-forward amplifier; receiving the feedback voltage at a second input of the feed-forward amplifier; and coupling an output of the feed-forward amplifier with an output of the second stage amplifier.

Assignees

• Freescale Semiconductor Inc

Inventors

• Park Chang Joon
• Geetla Ravi C
• Gonzalez Octavio A

Classifications

• G05F1/625

  wherein it is irrelevant whether the variable actually regulated is AC or DC · CPC title

• H03F1/26 Primary

  Modifications of amplifiers to reduce influence of noise generated by amplifying elements · CPC title

• H03F2203/45051

  Two or more differential amplifiers cascade coupled · CPC title

• H03F2200/372

  Noise reduction and elimination in amplifier · CPC title

• H03F3/45076

  characterised by the way of implementation of the active amplifying circuit in the differential amplifier · CPC title