Electro-optical device and electronic apparatus
US-2015103284-A1 · Apr 16, 2015 · US
US2016307931A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016307931-A1 |
| Application number | US-201514955517-A |
| Country | US |
| Kind code | A1 |
| Filing date | Dec 1, 2015 |
| Priority date | Apr 14, 2015 |
| Publication date | Oct 20, 2016 |
| Grant date | — |
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A thin film transistor TFT substrate includes a substrate, a first conductive pattern that extends on the substrate in a first direction, a second conductive pattern located on the same layer as the first conductive pattern and nearest to a first side of the first conductive pattern in a second direction that is perpendicular to the first direction, and a dummy pattern located on the same layer as the first conductive pattern and located adjacent a second other side of the first conductive pattern which is opposite to the first side of the first conductive pattern.
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What is claimed is: 1 . A thin film transistor (TFT) substrate comprising: a substrate; a first conductive pattern located on the substrate and extends in a first direction; a second conductive pattern located on a same layer as the first conductive pattern nearest to the first conductive pattern among conductive patterns located adjacent a first side of the first conductive pattern, wherein the second conductive pattern extends in a second direction that is perpendicular to the first direction; and a dummy pattern unit located on the same layer as the first conductive pattern and located adjacent a second side of the first conductive pattern which is opposite to the first side of the first conductive pattern. 2 . The TFT substrate of claim 1 , wherein the first and second conductive patterns are spaced apart by a first distance, and the first conductive pattern and the dummy pattern unit is spaced apart by a second distance that is equal to or less than the first distance. 3 . The TFT substrate of claim 1 , wherein the dummy pattern unit comprises a plurality of dummy patterns that are connected to or spaced apart from each other. 4 . The TFT substrate of claim 3 , wherein the plurality of dummy patterns are arranged in a zigzag pattern. 5 . The TFT substrate of claim 1 , further comprising a third conductive pattern located on the same layer as the first conductive pattern, nearest to the first conductive pattern among conductive patterns located adjacent a side of the dummy pattern unit which is opposite to another side of the dummy pattern unit where the first conductive pattern is located adjacently, wherein the third conductive pattern extends in the same first direction as the first conductive pattern, wherein the third conductive pattern is spaced apart from the first conductive pattern by a third distance that is greater than the first distance. 6 . The TFT substrate of claim 5 , further comprising: a TFT that comprises an active pattern and the second conductive pattern, where the second conductive pattern comprises a gate electrode that overlaps a portion of the active pattern. 7 . The TFT substrate of claim 1 , further comprising a third conductive pattern located on the same layer as the first conductive pattern and nearest among conductive patterns located adjacent a side of the dummy pattern unit which is opposite to another side of the dummy pattern unit where the first conductive pattern is located adjacently, wherein the third conductive pattern is spaced apart from the first conductive pattern by a third distance that is greater than the first distance. 8 . The TFT substrate of claim 7 , further comprising: a first TFT that comprises a first active pattern and the second conductive pattern, where the second comprises a first gate electrode that overlaps a portion of the first active pattern; a first pixel electrode that is electrically connected to the first TFT; a second TFT that comprises a second active pattern and the third conductive pattern, where the third conductive pattern comprises a second gate electrode that overlaps a portion of the second active pattern; and a second pixel electrode that is electrically connected to the second TFT. 9 . A display apparatus comprising: the thin film transistor (TFT) substrate of claim 1 ; and a display panel located on the TFT substrate. 10 . A method of manufacturing a thin film transistor (TFT) substrate, the method comprising: forming, on a substrate, a first conductive pattern to extend in a first direction; forming a second conductive pattern at a position nearest to the first conductive pattern among conductive patterns located adjacent a first side of the first conductive pattern in a second direction that is perpendicular to the first direction; and forming a dummy pattern adjacent a second side of the first conductive pattern that is opposite to the first side of the first conductive pattern. 11 . The method claim 10 , wherein the first and second conductive patterns are spaced apart by a first distance, and the first conductive pattern and the dummy pattern unit is spaced apart by a second distance that is equal to or less than the first distance. 12 . The method of claim 10 , wherein the dummy pattern unit comprises a plurality of dummy patterns that are connected to or spaced apart from each other. 13 . The method of claim 12 , wherein the plurality of dummy patterns are arranged in a zigzag pattern. 14 . The method of claim 10 , further comprising forming a third conductive pattern to extend in the same first direction as the first conductive pattern and at a position nearest to the first conductive pattern among conductive patterns located adjacent a side of the dummy pattern unit which is opposite to another side of the dummy pattern unit where the first conductive pattern is located, and where the third conductive pattern is spaced apart from the first conductive pattern by a third distance that is greater than the first distance. 15 . The method of claim 14 , further comprising prior to forming the second conductive pattern, forming an active pattern, wherein the second conductive pattern comprises a gate electrode that overlaps a portion of the active pattern, and the second conductive pattern and the active pattern are part of a TFT. 16 . The method of claim 10 , further comprising forming a third conductive pattern at a position nearest to the first conductive pattern among conductive patterns located adjacent a side of the dummy pattern unit which is opposite to another side of the dummy pattern unit where the first conductive pattern is located adjacently, wherein the third conductive pattern is spaced apart from the first conductive pattern by a third distance that is greater than the first distance. 17 . The method of claim 16 , further comprising: prior to forming the second conductive pattern, forming a first active pattern, wherein the second conductive pattern comprises a first gate electrode that overlaps a portion of the first active pattern, and the first active pattern and the first gate electrode are part of a first TFT; forming a first pixel electrode that is electrically connected to the first TFT; prior to forming the third conductive pattern, forming a second active pattern, where the third conductive pattern comprises a second gate electrode that overlaps a portion of the second active pattern, and the second active pattern and the second gate electrode are part of a second TFT; and forming a second pixel electrode that is electrically connected to the second TFT. 18 . A method of manufacturing a display apparatus, the method comprising: forming a display panel on a thin film transistor (TFT) substrate that is manufactured according to the method of claim 10 . 19 . A display device comprising: a substrate comprising first and second pixels that are adjacent one another; a dummy pattern located between the first and second pixels; and a first conductive pattern located on the substrate between the dummy pattern and the first pixel, wherein the first pixel comprises a first thin film transistor TFT, the first TFT comprising a second conductive pattern located on a same layer as the first conductive pattern and adjacent a side of the first conductive pattern that is opposite a side of the first conductive pattern adjacent the dummy pattern. 20 . The display device of claim 19 , wherein the dummy pattern is located a first distance away from th
integrated with passive devices, e.g. auxiliary capacitors · CPC title
Interconnections, e.g. scanning lines · CPC title
of multiple TFTs · CPC title
having a particular composition, shape or crystalline structure of the active layer · CPC title
wherein the TFTs are in active matrices · CPC title
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