Semiconductor device having a heat conduction member

US2016307818A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016307818-A1
Application numberUS-201514837980-A
CountryUS
Kind codeA1
Filing dateAug 27, 2015
Priority dateApr 20, 2015
Publication dateOct 20, 2016
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A semiconductor device includes a substrate having a first surface and a second surface opposite to the first surface, a hole formed through the first and second surfaces of the substrate, a semiconductor element disposed on the first surface to cover the hole, a housing in which the substrate and the semiconductor element are housed, and a heat conduction member disposed in the hole, such that heat generated by the semiconductor element is transferred through the heat conduction member towards a portion of the housing facing the second surface of the substrate.

First claim

Opening claim text (preview).

What is claimed is: 1 . A semiconductor device, comprising: a substrate having a first surface and a second surface opposite to the first surface, a hole formed through the first and second surfaces of the substrate; a semiconductor element disposed on the first surface to cover the hole; a housing in which the substrate and the semiconductor element are housed; and a heat conduction member disposed in the hole, such that heat generated by the semiconductor element is transferred through the heat conduction member towards a portion of the housing facing the second surface of the substrate. 2 . The semiconductor device according to claim 1 , wherein the heat conduction member is in contact with the portion of the housing. 3 . The semiconductor device according to claim 1 , wherein the heat conduction member is in contact with the semiconductor element. 4 . The semiconductor device according to claim 1 , further comprising: a connecting member disposed between the semiconductor element and the heat conduction member. 5 . The semiconductor device according to claim 1 , wherein the heat conduction member is integrally formed with the housing. 6 . The semiconductor device according to claim 1 , wherein the housing includes a protrusion that protrudes towards an inner space of the housing, and the heat conduction member is in contact with the protrusion. 7 . The semiconductor device according to claim 1 , further comprising: a semiconductor memory unit disposed on the first surface of the substrate adjacent to the semiconductor element, wherein the semiconductor element is a controller configured to control the semiconductor memory unit. 8 . The semiconductor device according to claim 7 , wherein a position of the hole is offset from a center of the semiconductor element towards the semiconductor memory unit. 9 . The semiconductor device according to claim 1 , wherein the semiconductor element is a semiconductor memory unit. 10 . The semiconductor device according to claim 1 , wherein the heat conduction member is spaced apart from an inner surface of the hole. 11 . The semiconductor device according to claim 1 , further comprising: a second substrate on which the substrate is mounted and having a hole penetrating therethrough, wherein the heat conduction member is also disposed in the hole of the second substrate. 12 . The semiconductor device according to claim 1 , wherein the heat conduction member is formed of an elastic material and pressed between the semiconductor element and the housing. 13 . The semiconductor device according to claim 1 , wherein an end of the heat conduction member facing the housing is adhesive. 14 . The semiconductor device according to claim 1 , wherein an end of the heat conduction member facing the semiconductor element is adhesive. 15 . The semiconductor device according to claim 1 , further comprising: a second heat conduction member disposed between the first surface of the substrate and the housing and enclosing the semiconductor element. 16 . The semiconductor device according to claim 15 , wherein the second heat conduction member is formed of an elastic material and pressed between the semiconductor element and the housing. 17 . A method for transferring heat generated in a semiconductor device including a substrate, a semiconductor element disposed on a first surface of the substrate, and a housing in which the substrate and the semiconductor element are housed, the method comprising: transferring heat generated by the semiconductor element towards a portion of the housing facing a second surface of the substrate opposite to the first surface, through a heat conduction member disposed in a hole formed in the substrate. 18 . The method according to claim 17 , further comprising: transferring the heat generated by the semiconductor element towards a portion of the housing facing the first surface of the substrate, through a second heat conduction member disposed between the first surface of the substrate and the housing. 19 . The method according to claim 17 , wherein the semiconductor device further includes a semiconductor memory unit disposed on the first surface of the substrate adjacent to the semiconductor element, and the semiconductor element is a controller configured to control the semiconductor memory unit. 20 . The method according to claim 17 , wherein the semiconductor element is a semiconductor memory unit.

Assignees

Inventors

Classifications

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

  • Through-vias · CPC title

  • H10W40/228Primary

    the projecting parts being wire-shaped or pin-shaped · CPC title

  • H10W40/22Primary

    characterised by their shape, e.g. having conical or cylindrical projections · CPC title

  • Electricity · mapped topic

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2016307818A1 cover?
A semiconductor device includes a substrate having a first surface and a second surface opposite to the first surface, a hole formed through the first and second surfaces of the substrate, a semiconductor element disposed on the first surface to cover the hole, a housing in which the substrate and the semiconductor element are housed, and a heat conduction member disposed in the hole, such that…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10W40/228. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Oct 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).