Method of Manufacturing Semiconductor Devices

US2016307773A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016307773-A1
Application numberUS-201614990353-A
CountryUS
Kind codeA1
Filing dateJan 7, 2016
Priority dateApr 15, 2015
Publication dateOct 20, 2016
Grant date

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A substrate having an insulating layer including an oxide is loaded into a chamber, and at least a part of the insulating layer is removed by injecting a process gas including an etching source gas into the chamber. The removal process is performed in a pulse type in which a first period and a second period are repeated a plurality of times. The etching source gas is supplied at a first flow rate during the first period and is supplied at a second flow rate less than the first flow rate during the second period. A temperature of the inside of the chamber remains at 100° C. or more during the removal process.

First claim

Opening claim text (preview).

1 . A method of manufacturing a semiconductor device comprising: loading a substrate into a chamber, on which an insulating layer comprising an oxide is formed; and injecting a process gas comprising an etching source gas into the chamber to remove at least a portion of the insulating layer, wherein the process of removing at least a portion of the insulating layer is performed in a pulse type in which a first period and a second period are repeated a plurality of times, wherein the etching source gas is supplied at a first flow rate during the first period and is supplied at a second flow rate less than the first flow rate during the second period, wherein a temperature of the inside of the chamber remains at 100° C. or more during the process of the removing the portion of the insulating layer, wherein a pressure of the process gas in the chamber during the first and second periods is changed in such a way that a third period and a fourth period are alternately repeated, and wherein the pressure of the process gas in the chamber remains at a first pressure during the third period and remains at a second pressure lower than the first pressure during the fourth period. 2 . The method of manufacturing a semiconductor device of claim 1 , wherein the second period is an off state in which supply of the etching source gas is interrupted such that the supply of the etching source gas is repeatedly turned-on and turned-off during the process of removing the at least a portion of the insulating layer. 3 . The method of manufacturing a semiconductor device of claim 1 , wherein the second period is longer than the first period. 4 . The method of manufacturing a semiconductor device of claim 3 , wherein the second period is from 3 to 15 times as long as the first period. 5 . The method of manufacturing a semiconductor device of claim 3 , wherein the first period ranges from 1 second to 20 seconds, and the second period ranges from 5 seconds to 60 seconds. 6 . The method of manufacturing a semiconductor device of claim 1 , wherein sublimation of etching by-products generated while the insulating layer is removed, proceeds during the second period. 7 . The method of manufacturing a semiconductor device of claim 1 , wherein the process gas is supplied into the chamber in a gas state that does not become plasma, or by a remote plasma method. 8 . The method of manufacturing a semiconductor device of claim 1 , wherein the etching source gas comprises HF and NH 3 or comprises at least two of NF 3 , NH 3 , HF or H 2 . 9 - 10 . (canceled) 11 . The method of manufacturing a semiconductor device of claim 1 , wherein the process gas is purged during the fourth period. 12 . The method of manufacturing a semiconductor device of claim 1 , wherein a start point and an end point of the third period is the same as a start point and an end point of the first period, respectively, and wherein a start point and an end point of the fourth period is the same as a start point and an end point of the second period, respectively. 13 . The method of manufacturing a semiconductor device of claim 1 , wherein a start point and an end point of the third period are later than a start point and an end point of the first period, respectively, and wherein a start point and an end point of the fourth period are later than a start point and an end point of the second period, respectively. 14 . A dry cleaning method comprising: loading a substrate into a chamber, on which an insulating layer comprising an oxide is formed; and removing at least a portion of the insulating layer by injecting a process gas comprising an etching source gas into the chamber, wherein the process of removing at least a portion of the insulating layer is performed in a pulse type in which a first period comprising an on-state and a second period comprising an off-state of supplying of the etching source gas are alternately repeated a plurality of times, wherein a temperature of the inside of the chamber remains at 100° C. or more during the process of removing the at least a part of the insulating layer, wherein a pressure of the process gas in the chamber during the first and second periods is changed in such a way that a third period and a fourth period are alternately repeated, and wherein the pressure of the process gas in the chamber remains at a first pressure during the third period and remains at a second pressure lower than the first pressure during the fourth period. 15 . The dry cleaning method of claim 14 , wherein a pulse interval corresponding to the on-state of the supplying of the etching source gas is less than a pulse interval corresponding to the off-state of the supplying of the etching source gas. 16 . The dry cleaning method of claim 14 , wherein a temperature of the inside of the chamber remains at 200° C. or less during the process of removing at least a portion of the insulating layer. 17 . The dry cleaning method of claim 14 , wherein sublimation of etching by-products generated while the insulating layer is removed, proceeds during the off-state. 18 . The dry cleaning method of claim 14 , wherein the process gas is purged during the off-state. 19 . The dry cleaning method of claim 14 , wherein the etching source gas comprises HF and NH 3 or comprises at least two of NF 3 , NH 3 , HF or H 2 . 20 . A method of manufacturing a semiconductor device comprising: forming a first layer and a second layer comprising a material having an etch selectivity with respective to the first layer, on a substrate, the first layer comprising an insulating material and horizontally adjacent to the second layer; and removing at least a portion of the first layer, wherein the process of removing the at least a portion of the first layer comprises: loading a substrate on which the first and second layers are formed, into a chamber; and supplying a process gas comprising an etching source gas into the chamber in a pulse type in which a first period and a second period are repeated a plurality of times, wherein the etching source gas is supplied at a first flow rate during the first period and is supplied at a second flow rate less than the first flow rate during the second period, wherein a temperature of the inside of the chamber remains at 100° C. or more during the removing the at least a part of the first layer, wherein a pressure of the process gas in the chamber during the first and second periods is changed in such a way that a third period and a fourth period are alternately repeated, and wherein the pressure of the process gas in the chamber remains at a first pressure during the third period and remains at a second pressure lower than the first pressure during the fourth period. 21 . The method of manufacturing a semiconductor device of claim 20 , wherein a start point and an end point of the third period is the same as a start point and an end point of the first period, respectively, and wherein a start point and an end point of the fourth period is the same as a start point and an end point of the second period, respectively. 22 . The method of manufacturing a semiconductor device of claim 20 , wherein a start point and an end point of the third period are later than a start point and an end point of the first period, respectively, and wherein a start point and an end point of the fourth period are later than a start point and an end point of the second period, respectively.

Assignees

Inventors

Classifications

  • the processing being the formation of vias or contact holes · CPC title

  • of dielectric parts comprising air gaps · CPC title

  • comprising air gaps · CPC title

  • H10P50/283Primary

    by chemical means · CPC title

  • Electricity · mapped topic

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What does patent US2016307773A1 cover?
A substrate having an insulating layer including an oxide is loaded into a chamber, and at least a part of the insulating layer is removed by injecting a process gas including an etching source gas into the chamber. The removal process is performed in a pulse type in which a first period and a second period are repeated a plurality of times. The etching source gas is supplied at a first flow ra…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P50/283. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Oct 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).