Extended use of logarithm and exponent instructions

Patent metadata

Field	Value
Publication number	US-2016307004-A1
Application number	US-201514685978-A
Country	US
Kind code	A1
Filing date	Apr 14, 2015
Priority date	Apr 14, 2015
Publication date	Oct 20, 2016
Grant date	—

Abstract

Embodiments of the present disclosure are based on a recognition that some processors are configured with instructions to compute logarithms and exponents (i.e. some processors include log and exp circuits). Embodiments of the present disclosure are further based on an insight that the use of the existing log and exp circuits could be extended to compute certain other functions by using the existing log and exp circuits to transform from a Cartesian to a logarithmic domain and vice versa and performing the actual computations of the functions in the logarithmic domain, which may be computationally easier than performing the computations in the Cartesian domain.

First claim

What is claimed is:

1 . An apparatus for computing a nonlinear function of an input variable, the apparatus comprising:
a logarithmic circuit configured to compute a logarithm of a first input value; a reciprocal circuit configured to obtain the logarithm of the first input value and configured to:
when enabled, negate the logarithm of the first input value and provide the negated logarithm of the first input value as an output of the reciprocal circuit, and
when disabled, provide the logarithm of the first input value as the output of the reciprocal circuit;
a root circuit configured to obtain the output of the reciprocal circuit and configured to:
when enabled, divide the received output of the reciprocal circuit by N and provide the divided output of the reciprocal circuit as an output of the root circuit, and
when disabled, provide the received output of the reciprocal circuit as the output of the root circuit;
a control logic configured to:
enable the reciprocal circuit and disable the root circuit when the nonlinear function is a reciprocal,
disable the reciprocal circuit and enable the root circuit when the nonlinear function is an Nth root, and
enable the reciprocal circuit and enable the root circuit when the nonlinear function is a reciprocal Nth root.

2 . The apparatus according to claim 1 , further comprising:
an exponential circuit configured to compute an exponent of the output of the root circuit.

3 . The apparatus according to claim 1 , further comprising:
an absolute value circuit configured to compute an absolute value of the input variable, store a sign of the input variable, and provide the computed absolute value to the logarithmic circuit as the first input value.

4 . The apparatus according to claim 3 , further comprising:
an exponential circuit configured to compute an exponent of the output of the root circuit and to combine the computed exponent with the stored sign of the input variable.

5 . The apparatus according to claim 1 , wherein the first input value is a floating point value.

6 . The apparatus according to claim 1 , wherein the first input value is a fixed point value.

7 . The apparatus according to claim 1 , wherein the apparatus is implemented in an application specific integrated circuit (ASIC), a programmable gate array (PGA), or a digital signal processor (DSP).

8 . A non-transitory computer readable storage medium storing one or more computer readable instructions which, when executed on a processor, configure the processor to carry out a method for computing a nonlinear function of an input variable, the method comprising:
instructing a logarithmic circuit to compute a logarithm of a first input value; instructing a reciprocal circuit to obtain the logarithm of the first input value and to perform:
when enabled, negate the logarithm of the first input value and provide the negated logarithm of the first input value as an output of the reciprocal circuit, and
when disabled, provide the logarithm of the first input value as the output of the reciprocal circuit;
instructing a root circuit to obtain the output of the reciprocal circuit and to perform:
when enabled, divide the received output of the reciprocal circuit by 2 and provide the divided output of the reciprocal circuit as an output of the root circuit, and
when disabled, provide the received output of the reciprocal circuit as the output of the root circuit;
enabling the reciprocal circuit and disabling the root circuit when the nonlinear function is a reciprocal; disabling the reciprocal circuit and enabling the root circuit when the nonlinear function is a Nth root; and enabling the reciprocal circuit and enabling the root circuit when the nonlinear function is a reciprocal Nth root.

9 . An apparatus for computing a reciprocal of an input variable, the apparatus comprising:
a logarithmic circuit configured to compute a logarithm of a first input value; a reciprocal circuit configured to negate the logarithm of the first input value and provide the negated logarithm of the first input value as an output of the reciprocal circuit; and an exponential circuit configured to compute an exponent of the output of the reciprocal circuit.

10 . The apparatus according to claim 9 , further comprising:
an absolute value circuit configured to compute an absolute value of the input variable, store a sign of the input variable, and provide the computed absolute value to the logarithmic circuit as the first input value.

11 . The apparatus according to claim 10 , wherein the exponential circuit is further configured to combine the computed exponent with the stored sign of the input variable.

12 . The apparatus according to claim 9 , wherein the first input value is a floating point value.

13 . The apparatus according to claim 9 , wherein the first input value is a fixed point value.

14 . The apparatus according to claim 9 , wherein the apparatus is implemented in an application specific integrated circuit (ASIC), a programmable gate array (PGA), or a digital signal processor (DSP).

Assignees

• Analog Devices Inc

Inventors

• Caputo Timothy J
• Porges Donald F

Classifications

• G06F7/5235 Primary

  using indirect methods, e.g. quarter square method, via logarithmic domain · CPC title

• G06G7/26 Primary

  Arbitrary function generators (using orthogonal functions, e.g. Fourier series, G06G7/19) · CPC title