In-cell touch panel and display device

US2016306454A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016306454-A1
Application numberUS-201414648090-A
CountryUS
Kind codeA1
Filing dateSep 20, 2014
Priority dateMay 30, 2014
Publication dateOct 20, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An in-cell touch panel and a display device are provided. Self-capacitance electrodes arranged in the same layer as pixel electrodes are disposed at gaps between the pixel electrodes of the touch panel in accordance with the self-capacitance principle. A touch detection chip can determine a touch position by detection of capacitance variation of the self-capacitance electrodes in a touch period. The touch panel does not need to add additional processes on the basis of the manufacturing process of an array substrate and hence can reduce the manufacturing cost and improve the productivity.

First claim

Opening claim text (preview).

1 . An in-cell touch panel, comprising: a first substrate and a second substrate arranged opposite to each other, a pixel electrode layer disposed on one side of the second substrate facing the first substrate, and a touch detection chip, wherein the pixel electrode layer includes a plurality of pixel electrodes and self-capacitance electrodes insulated from each other; the pixel electrodes are arranged in an array; a pattern of each self-capacitance electrode is disposed at a gap between two adjacent pixel electrodes; and the touch detection chip is configured to determine a touch position by detection of capacitance variation of the self-capacitance electrodes in a touch period. 2 . The in-cell touch panel according to claim 1 , wherein the pattern of the self-capacitance electrode is a mesh structure including a plurality of mesh holes; and the plurality of pixel electrodes correspond to the plurality of mesh holes. 3 . The in-cell touch panel according to claim 1 , further comprising: a plurality of leads configured to connect the self-capacitance electrodes to the touch detection chip. 4 . The in-cell touch panel according to claim 3 , wherein the leads and the self-capacitance electrodes are arranged in different layers. 5 . The in-cell touch panel according to claim 4 , wherein an orthographic projection of a pattern of the lead on the second substrate is disposed at a gap between two adjacent pixel electrodes. 6 . The in-cell touch panel according to claim 5 , further comprising: gate signal lines and data signal lines which intersect each other and are disposed on one side of the second substrate facing the first substrate, wherein an extension direction of the leads is the same with that of the gate signal lines or the data signal lines. 7 . The in-cell touch panel according to claim 6 , wherein every two adjacent rows of pixel electrodes are taken as a pixel group; two gate signal lines are disposed between the two adjacent rows of pixel electrodes and configured to provide gate scanning signals for the two adjacent rows of pixel electrodes respectively; and the leads are disposed at gaps between adjacent pixel groups and arranged in the same layer as the gate signal lines. 8 . The in-cell touch panel according to claim 6 , wherein two gate signal lines are disposed between adjacent rows of pixel electrodes; every two adjacent columns of pixel electrodes are taken as a pixel group and share a data signal line disposed between the two adjacent columns of pixel electrodes; and the leads are disposed at gaps between adjacent pixel groups and arranged in the same layer as the date signal lines. 9 . The in-cell touch panel according to claim 7 , further comprising: a plurality of metal wires arranged in the same layer as and insulated from the leads, wherein the metal wire and the lead are disposed in the same straight line and connected in parallel with an overlapped self-capacitance electrode. 10 . A display device, comprising the in-cell touch panel according to claim 1 . 11 . The in-cell touch panel according to claim 2 , further comprising: a plurality of leads configured to connect the self-capacitance electrodes to the touch detection chip. 12 . The in-cell touch panel according to claim 11 , wherein the leads and the self-capacitance electrodes are arranged in different layers. 13 . The in-cell touch panel according to claim 12 , wherein an orthographic projection of a pattern of the lead on the second substrate is disposed at a gap between two adjacent pixel electrodes. 14 . The in-cell touch panel according to claim 13 , further comprising: gate signal lines and data signal lines which intersect each other and are disposed on one side of the second substrate facing the first substrate, wherein an extension direction of the leads is the same with that of the gate signal lines or the data signal lines. 15 . The in-cell touch panel according to claim 14 , wherein every two adjacent rows of pixel electrodes are taken as a pixel group; two gate signal lines are disposed between the two adjacent rows of pixel electrodes and configured to provide gate scanning signals for the two adjacent rows of pixel electrodes respectively; and the leads are disposed at gaps between adjacent pixel groups and arranged in the same layer as the gate signal lines. 16 . The in-cell touch pan& according to claim 14 , wherein two gate signal lines are disposed between adjacent rows of pixel electrodes; every two adjacent columns of pixel electrodes are taken as a pixel group and share a data signal line disposed between the two adjacent columns of pixel electrodes; and the leads are disposed at gaps between adjacent pixel groups and arranged hi the same layer as the date signal lines. 17 . The in-cell touch panel according to claim 15 , further comprising: a plurality of metal wires arranged in the same layer as and insulated from the leads, wherein the metal wire and the lead are disposed in the same straight line and connected in parallel with an overlapped self-capacitance electrode. 18 . The in-cell touch panel according to claim 16 , further comprising: a plurality of metal wires arranged in the same layer as and insulated from the leads, wherein the metal wire and the lead are disposed in the same straight line and connected in parallel with an overlapped self-capacitance electrode. 19 . The in-cell touch panel according to claim 8 , further comprising: a plurality of metal wires arranged in the same layer as and insulated from the leads, wherein the metal wire and the lead are disposed in the same straight line and connected in parallel with an overlapped self-capacitance electrode.

Assignees

Inventors

Classifications

  • Wiring, e.g. gate line, drain line · CPC title

  • Constructional arrangements; {Manufacturing methods}(G02F1/135, G02F1/136 take precedence) · CPC title

  • using sets of wires, e.g. crossed wires · CPC title

  • Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices · CPC title

  • Digitisers structurally integrated in a display · CPC title

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What does patent US2016306454A1 cover?
An in-cell touch panel and a display device are provided. Self-capacitance electrodes arranged in the same layer as pixel electrodes are disposed at gaps between the pixel electrodes of the touch panel in accordance with the self-capacitance principle. A touch detection chip can determine a touch position by detection of capacitance variation of the self-capacitance electrodes in a touch period…
Who is the assignee on this patent?
Boe Technology Group Co Ltd, Beijing Boe Optoelectronics Tech Co Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/044. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Oct 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).