Length-compatible extended polar codes

Patent metadata

Field	Value
Publication number	US-2016294418-A1
Application number	US-201514794059-A
Country	US
Kind code	A1
Filing date	Jul 8, 2015
Priority date	Mar 31, 2015
Publication date	Oct 6, 2016
Grant date	—

Abstract

A method for increasing coding reliability includes generating a generator matrix for an extended polar code including a standard polar code part and an additional frozen part. The standard polar code part has N bit-channels, including K information bit-channels and N−K frozen bit-channels. The additional frozen part has q additional frozen bit-channels. Among the K information bit-channels, q information bit-channels are re-polarized using the q additional frozen bit-channels. The method further includes receiving an input vector including K information bits and N+q−K frozen bits, and transforming, using the generator matrix, the input vector to an output vector including N+q encoded bits. The K information bits are allocated to the K information bit-channels, and the N+q−K frozen bits are allocated to the N−K frozen bit-channels and the q additional frozen bit-channels.

First claim

What is claimed is:

1 . A method for increasing coding reliability, comprising:
generating a generator matrix for an extended polar code including:
a standard polar code part having N bit-channels, including K information bit-channels and N−K frozen bit-channels, wherein:
N equals 2 n , n being a positive integer, and
K is a positive integer equal to or smaller than N; and

an additional frozen part having q additional frozen bit-channels, q being a positive integer,
wherein q information bit-channels among the K information bit-channels are re-polarized using the q additional frozen bit-channels;
receiving an input vector including K information bits and N+q−K frozen bits; transforming, using the generator matrix, the input vector to an output vector including N+q encoded bits, the K information bits being allocated to the K information bit-channels, and the N+q−K frozen bits being allocated to the N−K frozen bit-channels and the q additional frozen bit-channels.

2 . The method of claim 1 , wherein generating the generator matrix includes constructing the standard polar code according to at least one of mutual information, Bhattacharyya parameter, or probability of error, to determine the q information bit-channels for repolarizing.

3 . The method of claim 1 , wherein generating the generator matrix includes:
constructing the standard polar code part to determine the K information bit-channels and the N−K frozen bit-channels from the N bit-channels, each of the information bit-channels having a probability of error smaller than the frozen bit-channels; determining q least reliable information bit-channels, the least reliable information bit-channels each having a probability of error larger than other ones of the information bit-channels; and re-polarizing the q least reliable information bit-channels using the q additional frozen bit-channels.

4 . The method of claim 3 , wherein re-polarizing the q least reliable information bit-channels includes re-polarizing each of the q least reliable information bit-channels using one of the q additional frozen bit-channels.

5 . The method of claim 1 , wherein generating the generator matrix includes generating a generator matrix including:
the standard polar code part having the N bit-channels, and the additional frozen part having the q additional frozen bit-channels, q being a positive integer smaller than one half of N.

6 . The method of claim 1 , wherein:
the standard polar code part is a first standard polar code part having N 1 bit-channels, including K 1 information bit-channels and N 1 −K 1 frozen bit-channels, wherein:
N 1 equals 2 n1 , n1 being a positive integer, and
K 1 is a positive integer equal to or smaller than N 1 ;
generating the generator matrix includes generating a generator matrix including:
the first standard polar code part, and
a second standard polar code part having N 2 bit-channels, including K 2 information bit-channels and N 2 −K 2 frozen bit-channels, wherein:
N 2 equals 2 n2 , n2 being a positive integer, and
K 2 is a positive integer equal to or smaller than N 2 ; and

wherein q information bit-channels of the K 1 information bit-channels and the K 2 information bit-channels are re-polarized using the q additional frozen bit-channels,
receiving the input vector includes receiving an input vector including at least K 1 +K 2 information bits and N 1 +N 2 +q−K 1 −K 2 frozen bits.

7 . The method of claim 6 , wherein generating the generator matrix includes:
constructing the first standard polar code part to determine the K 1 information bit-channels and the N 1 −K 1 frozen bit-channels from the N 1 bit-channels, each of the K 1 information bit-channels having a probability of error smaller than the N 1 −K 1 frozen bit-channels; constructing the second standard polar code part to determine the K 2 information bit-channels and the N 2 −K 2 frozen bit-channels from the N 2 bit-channels, each of the K 2 information bit-channels having a probability of error smaller than the N 2 −K 2 frozen bit-channels; determining q least reliable information bit-channels among the K 1 information bit-channels and the K 2 information bit-channels, the q least reliable information bit-channels each having a probability of error larger than other of the K 1 information bit-channels and the K 2 information bit-channels; and re-polarizing the q least reliable information bit-channels using the q additional frozen bit-channels.

8 . The method of claim 1 , further comprising:
transmitting the N+q encoded bits through N+q communication channels, each of the N+q encoded bits being transmitted through one of the N+q communication channels.

9 . The method of claim 1 , further comprising:
storing the N+q encoded bits in storage cells.

10 . The method of claim 9 , wherein:
the storage cells are single-level storage cells, and storing the N+q encoded bits includes storing each of the N+q encoded bits in one of N+q single-level storage cells.

11 . The method of claim 9 , wherein:
the storage cells are multi-level storage cells, each of which includes at least two storage levels, and storing the N+q encoded bits includes storing each of the N+q encoded bits in one of the at least two storage levels of one of the multi-level storage cells.

12 . A device for increasing coding reliability, comprising:
a processor; and a non-transitory computer-readable storage medium storing instructions that, when executed by the processor, cause the processor to:
generate a generator matrix for an extended polar code including:
a standard polar code part having N bit-channels, including K information bit-channels and N−K frozen bit-channels, wherein:
N equals 2 n , n being a positive integer, and
K is a positive integer equal to or smaller than N; and

an additional frozen part having q additional frozen bit-channels, q being a positive integer,
wherein q information bit-channels among the K information bit-channels are re-polarized using the q additional frozen bit-channels;

receive an input vector including K information bits and N+q−K frozen bits;
transform, using the generator matrix, the input vector matrix to an output vector including N+q encoded bits, the K information bits being allocated to the K information bit-channels, and the N+q−K frozen bits being allocated to the N−K frozen bit-channels and the q additional frozen bit-channels.

13 . A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to:
generate a generator matrix for an extended polar code including:
a standard polar code part having N bit-channels, including K information bit-channels and N−K frozen bit-channels, wherein:
N equals 2 n , n being a positive integer, and
K is a positive integer equal to or smaller than N; and

an additional frozen part having q additional frozen bit-channels, q being a positive integer,
wherein q information bit-channels among the K information bit-channels are re-polarized using the q additional frozen bit-channels;
receive an input vector including K information bits and N+q−K frozen bits; transform, using the generator matrix, the input vector to an output vector including N+q encoded bits, the K information bits being allocated to the K information bit-channels, and the N+q−K frozen bits being allocated to the N−K frozen bit-channels and the q additional frozen bit-channels.

Assignees

• Macronix Int Co Ltd

Inventors

• Huang Yu-Ming
• Li Hsiang-Pang
• Chang Hsie-Chia

Classifications

• H04L1/0067

  Rate matching (H04L1/0013 and H04L1/08 take precedence) · CPC title

• H03M13/13 Primary

  Linear codes · CPC title

• H04L1/0057

  Block codes (H04L1/0061, H04L1/0064 take precedence) · CPC title

• H03M13/635

  Error control coding in combination with rate matching · CPC title

• H03M13/618

  Shortening and extension of codes · CPC title