Clock synchronizer

Patent metadata

Field	Value
Publication number	US-2016294398-A1
Application number	US-201615085821-A
Country	US
Kind code	A1
Filing date	Mar 30, 2016
Priority date	Mar 30, 2015
Publication date	Oct 6, 2016
Grant date	—

Abstract

Apparatus for clock synchronisation comprising a first phase locked loop ( 405 ) and a second phase locked loop ( 400 ). The first phase locked loop ( 405 ) is configured to receive a reference signal (Fcrystal) having a reference frequency, and operable to produce an output signal (Fout) having an output frequency that is a multiple of the reference frequency. The first phase locked loop ( 405 ) comprises a frequency divider ( 428 ) that controls the multiple in response to a control signal. The second phase locked loop ( 400 ) is configured to determine a phase error between the output signal (Fout) and an input signal (Fantenna), and to provide the control signal to the first phase locked loop ( 405 ). The second phase locked loop ( 400 ) comprises phase adjustment means ( 450 ), operable to adjust a phase difference between the input and output signal by varying the control signal for a duration.

First claim

1 . Apparatus for clock synchronisation comprising:
a first phase locked loop configured to receive a reference signal having a reference frequency, and operable to produce an output signal having an output frequency that is a multiple of the reference frequency, the first phase locked loop comprising a frequency divider that controls the multiple in response to a control signal; a second phase locked loop configured to determine a phase error between the output signal and an input signal, and to provide the control signal to the first phase locked loop; wherein the second phase locked loop comprises phase adjustment means, operable to adjust a phase difference between the input and output signal by varying the control signal for a duration.

2 . The apparatus of claim 1 , wherein the second phase locked loop comprises a phase detector, loop filter and sigma-delta modulator, the phase detector configured to provide a phase error signal that indicates a phase difference between input and output signals, the loop filter configured to receive the phase error signal, and to provide an input to the sigma-delta modulator, the sigma delta modulator configured to provide the control signal, so as to provide a multiple that may be fractional.

3 . The apparatus claim 2 , wherein the phase adjustment means is configured to vary an input value to the sigma-delta modulator by adding an offset between the loop filter and sigma-delta modulator.

4 . The apparatus of claim 2 , wherein the phase adjustment means is configured to vary a transfer function of the loop filter.

5 . The apparatus of any of claim 2 , wherein the phase adjustment means is operable to vary the control signal by adding an offset to the output of the sigma-delta modulator by cycle swallowing/adding.

6 . The apparatus of claim 1 , wherein the first phase locked loop comprises a frequency controlled oscillator, and the frequency divider comprises a post-divider configured to receive the output of the frequency controlled oscillator and to output the output signal.

7 . The apparatus of claim 1 , wherein the first phase locked loop comprises a frequency controlled oscillator and a phase detector configured to determine a phase difference between the output of the frequency controlled oscillator and feedback signal, and the frequency divider comprises a feedback-divider connected between the frequency controlled oscillator and phase detector to provide the feedback signal.

8 . The apparatus of claim 1 , further comprising control logic, wherein the apparatus is configured to receive the input signal from an antenna, and the control logic is configured to modulate a loading of the antenna during a transmit period to transmit information to a further antenna that is inductively coupled to the antenna.

9 . The apparatus of claim 8 , wherein the control logic is configured to operate the phase adjustment means to adjust the phase difference between the output signal and input signal prior to a transmit period.

10 . The apparatus of claim 9 , wherein the control logic is configured to, after the transmit period, operate the phase adjustment means to revert the phase adjustment that occurred prior to the transmit period.

11 . The apparatus of claim 1 , further comprising an adjustable delay line, configured to adjust the phase difference between the input signal and output signal.

12 . A remote communication device, comprising the apparatus of claim 1 , and an antenna configured to provide the input signal.

13 . The remote communication device of claim 12 , wherein the remote communication device comprise a near field communications device.

14 . A mobile phone, tablet, or portable personal computer comprising the remote communication device of claim 13 .

Assignees

• Nxp Bv

Inventors

• Verlinden Jos
• Van De Beek Remco
• Mendel Stefan

Classifications

• H04B5/45

  Transponders · CPC title

• H04B5/24

  Inductive coupling · CPC title

• H03L7/087 Primary

  using at least two phase detectors or a frequency and phase detector in the loop · CPC title

• H04W4/008

  Electricity · mapped topic

• H03L7/1803

  the counter or frequency divider being connected to a cycle or pulse swallowing circuit · CPC title