Methods and Devices for Fabricating and Assembling Printable Semiconductor Elements

Patent metadata

Field	Value
Publication number	US-2016293794-A1
Application number	US-201615084211-A
Country	US
Kind code	A1
Filing date	Mar 29, 2016
Priority date	Jun 4, 2004
Publication date	Oct 6, 2016
Grant date	—

Abstract

The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.

First claim

We claim:

1 . A wafer of printable light emitting diodes, the wafer comprising:
a substrate native to a plurality of printable light emitting diodes; and the plurality of printable light emitting diodes, each light emitting diode of the plurality of printable light emitting diodes disposed on the native substrate and partially released from the substrate such that each light emitting diode is connected to the substrate via a partially etched sacrificial layer, wherein a remaining portion of the partially etched sacrificial layer connecting each light emitting diode to the substrate breaks when a transfer device in contact with the plurality of printable semiconductor elements moves away from the substrate.

2 . The wafer of claim 1 , wherein the partially etched sacrificial layer is located between the substrate and the plurality of printable light emitting diodes.

3 . The wafer of claim 2 , wherein the partially etched sacrificial layer comprises SiN.

4 . The wafer of claim 2 , wherein the partially etched sacrificial layer comprises SiO 2 .

5 . The wafer of claim 1 , wherein the printable light emitting diode comprises an inorganic semiconductor structure.

6 . The wafer of claim 1 , wherein the wafer is a member selected from the group consisting of a single crystalline silicon wafer, a silicon on insulator wafer, a polycrystaline silicon wafer, a GaAs wafer, a silicon on substrate wafer, a germanium wafer, a thin film, polycrystalline silicon wafer, and an ultra thin silicon wafer.

7 . The wafer of claim 1 , wherein the plurality of printable light emitting diodes form an array of light emitting diodes.

8 . The wafer of claim 1 , wherein the substrate is a member selected from the group consisting of gallium arsenide, gallium nitride, silicon, and germanium.

9 . The wafer of claim 1 , wherein each printable light emitting diode comprises a top surface coated with a release layer that facilitates bonding of the printable light emitting diode to a contact surface of a transfer device and subsequent release.

10 . The wafer of claim 9 , wherein the release layer comprises a photoresist.

11 . The wafer of claim 1 , wherein each printable light emitting diode comprises at least one smooth surface exhibiting deviations from an average surface position of less than 10 nm.

12 . The wafer of claim 1 , wherein each printable light emitting diode has a field effect mobility greater than or equal to 300 cm 2 V −1 s −1 .

13 . The wafer of claim 1 , wherein each printable light emitting diode comprises an N-doped semiconductor region positioned directly adjacent to a P-doped semiconductor region.

14 . The wafer of claim 1 , wherein each printable light emitting diode of the plurality of light emitting diodes has a thickness between 10 nm to 100 microns.

15 . The wafer of claim 14 , wherein each printable light emitting diode of the plurality of light emitting diodes has a width from 100 nm to 1 millimeter.

16 . The wafer of claim 15 , wherein each printable light emitting diode of the plurality of light emitting diodes has a length from 1 micron to 1 millimeter.

Assignees

• Univ Illinois

Inventors

• Nuzzo Ralph G
• Rogers John A
• Menard Etienne
• Lee Keon Jae
• Khang Dahl-Young
• Sun Yugang
• Meitl Matthew
• Zhu Zhengtao

Classifications

• H10W99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W72/932

  Plan-view shape, i.e. in top view · CPC title

• H10W72/952

  comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title

• H10W72/923

  Bond pads having multiple stacked layers · CPC title