Semiconductor device

Patent metadata

Field	Value
Publication number	US-2016293746-A1
Application number	US-201615189339-A
Country	US
Kind code	A1
Filing date	Jun 22, 2016
Priority date	Mar 15, 2013
Publication date	Oct 6, 2016
Grant date	—

Abstract

The semiconductor device has a barrier layer formed on a channel layer, an n type diffusion preventing layer formed on the barrier layer and containing aluminum, and a source electrode and a drain electrode formed on the diffusion preventing layer. The semiconductor device further has a p type cap layer formed on the diffusion preventing layer sandwiched between the source electrode and the drain electrode and a gate electrode formed on the cap layer. The diffusion preventing layer has an aluminum composition ratio greater than the aluminum composition ratio of the barrier layer.

First claim

What is claimed is:

1 . A semiconductor device, comprising:
a substrate; a first nitride semiconductor layer formed over the substrate; a second nitride semiconductor layer formed over the first nitride semiconductor layer; a source electrode and a drain electrode for a field effect transistor formed over the second nitride semiconductor layer while being separated from each other; a third nitride semiconductor layer formed over the second nitride semiconductor layer sandwiched between the source electrode and the drain electrode while being separated from each of the source electrode and the drain electrode; a fourth nitride semiconductor layer formed over the third nitride semiconductor layer; and a gate electrode for the field effect transistor formed over the fourth nitride semiconductor layer, wherein the band gap of the second nitride semiconductor layer is greater than the band gap of the first nitride semiconductor layer, wherein the third nitride semiconductor layer contains aluminum and is an n type semiconductor layer, wherein the fourth nitride semiconductor layer is a p type semiconductor layer, and wherein the second nitride semiconductor layer contains aluminum at a composition ratio smaller than the aluminum composition ratio of the third nitride semiconductor layer or contains no aluminum.

2 . The semiconductor device according to claim 1 ,
wherein the fourth nitride semiconductor layer contains magnesium or carbon.

3 . The semiconductor device according to claim 1 ,
wherein the fourth nitride semiconductor layer comprises: a fifth nitride semiconductor layer formed over the third nitride semiconductor layer; and a sixth nitride semiconductor layer formed over the fifth nitride semiconductor layer, wherein the fifth nitride semiconductor layer contains carbon, and wherein the sixth nitride semiconductor layer contains magnesium.

4 . The semiconductor device according to claim 1 ,
wherein the fourth nitride semiconductor layer contains magnesium and carbon, wherein the magnesium concentration of the fourth nitride semiconductor layer decreases from the interface between the fourth nitride semiconductor layer and the gate electrode to the interface between the fourth nitride semiconductor layer and the third nitride semiconductor layer, and wherein the carbon concentration of the fourth nitride semiconductor layer increases from the interface between the fourth nitride semiconductor layer and the gate electrode to the interface between the fourth nitride semiconductor layer and the third nitride semiconductor layer.

5 . The semiconductor device according to claim 1 ,
wherein the second nitride semiconductor layer contains a first n type impurity, wherein the third nitride semiconductor layer contains a second n type impurity, and wherein the concentration of the second n type impurity of the third nitride semiconductor layer is greater than the concentration of the first n type impurity of the second nitride semiconductor layer.

6 . The semiconductor device according to claim 1 ,
wherein the fourth nitride semiconductor layer contains aluminum.

7 . The semiconductor device according to claim 1 , further comprising:
a seventh nitride semiconductor layer formed over the third nitride semiconductor layer sandwiched between the fourth nitride semiconductor layer and the source electrode or over the third nitride semiconductor layer sandwiched between the fourth nitride semiconductor layer and the drain electrode, wherein the seventh nitride semiconductor layer has a p type semiconductor layer which is the same layer as the fourth nitride semiconductor layer, and wherein the seventh nitride semiconductor layer has a thickness smaller than the thickness of the fourth nitride semiconductor layer.

8 . The semiconductor device according to claim 1 ,
wherein the first nitride semiconductor layer has indium gallium nitride or gallium nitride, wherein the second nitride semiconductor layer has aluminum gallium nitride, wherein the third nitride semiconductor layer has aluminum gallium nitride, wherein the fourth nitride semiconductor layer has gallium nitride, and wherein the second nitride semiconductor layer has aluminum at a composition ratio smaller than the aluminum composition ratio of the third nitride semiconductor layer.

9 . The semiconductor device according to claim 1 ,
wherein the first nitride semiconductor layer has indium gallium nitride, wherein the second nitride semiconductor layer has gallium nitride, wherein the third nitride semiconductor layer has aluminum gallium nitride, and wherein the fourth nitride semiconductor layer has gallium nitride.

Assignees

• Renesas Electronics Corp

Inventors

• Murase Yasuhiro

Classifications

• H10D62/343

  Gate regions of field-effect devices having PN junction gates · CPC title

• H10D62/8503

  Nitride Group III-V materials, e.g. AlN or GaN · CPC title

• H10D62/854

  further characterised by the dopants · CPC title

• H10D62/824

  comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions · CPC title

• H10D62/106

  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions · CPC title