Transient overvoltage protection device

Patent metadata

Field	Value
Publication number	US-2016293591-A1
Application number	US-201514678005-A
Country	US
Kind code	A1
Filing date	Apr 3, 2015
Priority date	Apr 3, 2015
Publication date	Oct 6, 2016
Grant date	—

Abstract

In one embodiment, an overvoltage protection device may include a semiconductor substrate comprising an n-type body region. The overvoltage protection device may further include a first p-type region disposed in a first surface region of the semiconductor substrate, and forming a first P/N junction with the n-type body region, and a second p-type region disposed in a second surface region of the semiconductor substrate opposite the first surface, and forming a second P/N junction with the n-type body region, wherein the n-type body region, first p-type region, and second p-type region form a breakdown device having a breakdown voltage greater than 100 V when an external voltage is applied between the first surface region and second surface region.

First claim

1 . An overvoltage protection device, comprising:
a semiconductor substrate comprising an n-type body region; a first p-type region disposed in a first surface region of the semiconductor substrate, and forming a first P/N junction with the n-type body region; and a second p-type region disposed in a second surface region of the semiconductor substrate opposite the first surface, and forming a second P/N junction with the n-type body region, wherein the n-type body region, first p-type region, and second p-type region form a breakdown device having a breakdown voltage greater than 100V when an external voltage is applied between the first surface region and second surface region.

2 . The overvoltage protection device of claim 1 , further comprising a first electrical contact on the first p-type region and a second electrical contact on the second p-type region.

3 . The overvoltage protection device of claim 1 , wherein the first p-type region and second p-type region have a thickness of 5 μm to 30 μm.

4 . The overvoltage protection device of claim 1 , wherein the first p-type region and second p-type region have a peak p-dopant concentration of 1E17/cm 3 -1E22/cm 3 .

5 . The overvoltage protection device of claim 1 , wherein the body region has an n-dopant concentration of 1E13/cm 3 to 1E16/cm 3 .

6 . The overvoltage protection device of claim 1 , wherein the first p-type region has a first dopant profile and the second p-type region has a second dopant profile matching the first dopant profile.

7 . The overvoltage protection device of claim 1 , wherein the breakdown device has a foldback voltage greater than 40V.

8 . A method of fabricating a semiconductor device, comprising:
providing an n-type semiconductor substrate; forming a first p-type region in a first surface region of the semiconductor substrate, the first p-type region forming a first P/N junction with the n-type semiconductor substrate; and forming a second p-type region in a second surface region of the semiconductor substrate opposite the first surface, the second p-type region forming a second P/N junction with the n-type semiconductor substrate, wherein the n-type semiconductor substrate forms an n-type body region disposed between the first p-type region and second p-type body region, wherein the forming the first p-type region and forming the second p-type region comprise driving a p-type dopant into the first p-type region and second p-type region in a plurality of drive-in operations, and wherein the n-type body region, first p-type region, and second p-type region form a breakdown device having a breakdown voltage greater than 100V when an external voltage is applied between the first surface region and second surface region.

9 . The method of claim 8 , wherein the forming the first p-type region is performed simultaneously with the forming the second p-type region.

10 . The method of claim 8 , wherein the forming the first p-type region and forming the second p-type region comprise exposing the n-type semiconductor substrate to BBr3.

11 . The method of claim 8 , wherein the forming the first p-type region and forming the second p-type region comprise performing at least one drive in operation at 1300° C. to 1350° C.

12 . The method of claim 8 , wherein the first p-type region and second p-type region have a thickness of 10 μm to 30 μm.

13 . The method of claim 8 , wherein the first p-type region and second p-type region have a peak p-dopant concentration of 1E17/cm 3 to 1E22/cm 3 .

14 . The method of claim 8 , wherein the body region has an n-dopant concentration of 1E13/cm 3 to 1E16/cm 3 .

15 . The method of claim 8 , wherein the forming the first p-type region and forming the second p-type region comprise implanting boron-containing ions into the first surface region and the second surface region.

16 . An overvoltage protection device, comprising:
a plurality of semiconductor die; and at least one electrical connection between a first semiconductor die and second semiconductor die, wherein the plurality of semiconductor die are connected in electrical series, wherein at least one semiconductor die of the plurality of semiconductor die comprises:
an n-type body region;
a first p-type region disposed on a first surface of the semiconductor die, and forming a first P/N junction with the body region; and
a second p-type region disposed on a second surface of the semiconductor die opposite the first surface, and forming a second P/N junction with the body region,
wherein the n-type body region, first p-type region, and second p-type region form a breakdown device having a breakdown voltage greater than 100 V when an external voltage is applied between the first surface and second surface, and wherein the overvoltage protection device has a breakdown voltage greater than 200 V.

17 . The overvoltage protection device of claim 16 , wherein the first p-type region and second p-type region have a thickness of 10 μm to 30 μm.

18 . The overvoltage protection device of claim 16 , wherein the first p-type region and second p-type region have a peak p-dopant concentration of 1E17/cm 3 to 1E22/cm 3 .

19 . The overvoltage protection device of claim 16 , wherein the body region has an n-dopant concentration of 1E13/cm 3 to 1E15/cm 3 .

20 . The overvoltage protection device of claim 16 , wherein the breakdown device has a foldback voltage greater than 100V.

Assignees

• Littelfuse Inc

Inventors

• Bentley Gary Mark
• Peters James Allan
• Byatt Steve Wilton

Classifications

• H10D62/104

  having particular shapes of the bodies at or near reverse-biased junctions, e.g. having bevels or moats · CPC title

• H10D8/041

  of multilayer diodes · CPC title

• H10D8/00

  Diodes (variable-capacitance diodes H10D1/64; gated diodes H10D12/00) · CPC title

• H10D89/611 Primary

  using diodes as protective elements · CPC title

• H01L29/66121

  Electricity · mapped topic