Multichip dynamic range enhancement (dre) audio processing methods and apparatuses

US2016286310A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016286310-A1
Application numberUS-201514975015-A
CountryUS
Kind codeA1
Filing dateDec 18, 2015
Priority dateMar 27, 2015
Publication dateSep 29, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In accordance with embodiments of the present disclosure, a multichip circuit for processing audio signals having dynamic range enhancement information over two or more integrated circuits may include a host integrated circuit and a client integrated circuit. The host integrated circuit may be configured to determine a dynamic range enhancement gain for a digital audio input signal, process the digital audio input signal in accordance with the dynamic range enhancement gain, and transmit audio data based on the processed digital audio input signal. The client integrated circuit may be coupled to the host integrated circuit and may be configured to receive the audio data and wherein the client integrated circuit is provided with the dynamic range enhancement gain and the client integrated circuit is configured to process the audio data with the dynamic range enhancement gain.

First claim

Opening claim text (preview).

What is claimed is: 1 . A multichip circuit for processing audio signals having dynamic range enhancement information over two or more integrated circuits, comprising: a host integrated circuit for determining a dynamic range enhancement gain for a digital audio input signal, processing the digital audio input signal in accordance with the dynamic range enhancement gain, and transmitting audio data based on the processed digital audio input signal; and a client integrated circuit coupled to the host integrated circuit wherein the client integrated circuit receives the audio data and wherein the client integrated circuit is provided with the dynamic range enhancement gain and the client integrated circuit processes the audio data with the dynamic range enhancement gain. 2 . The multichip circuit of claim 1 , wherein the host integrated circuit is further configured to transmit dynamic range enhancement information to the client integrated circuit in order to provide the client integrated circuit with the dynamic range enhancement gain. 3 . The multichip circuit of claim 2 , wherein the host integrated circuit further comprises a dynamic range enhancement host controller that controls and enhances a dynamic range of the digital audio input signal by the dynamic range enhancement gain and wherein the client integrated circuit further comprises a dynamic range enhancement client controller that controls and processes the audio data into an audio signal so that the audio signal is inversely gained by the dynamic range enhancement gain. 4 . The multichip circuit of claim 3 , wherein: the dynamic range enhancement host controller controls and enhances the dynamic range of the digital audio input signal by the dynamic range enhancement gain by applying a digital gain in accordance with the dynamic range enhancement gain; and the dynamic range enhancement client controller controls and processes the audio data into the audio signal by applying an analog gain in accordance with an inverse of the dynamic range enhancement gain. 5 . The multichip circuit of claim 4 , wherein a product of the digital gain and the analog gain approximately equals a constant value. 6 . The multichip circuit of claim 1 , wherein the host integrated circuit further comprises a dynamic range enhancement host rule based module for setting rules that determine the dynamic range enhancement gain that is to be applied to the digital audio input signal processed by the host integrated circuit and the client integrated circuit comprises a dynamic range enhancement client rule based module, in order to provide the client integrated circuit with the dynamic range enhancement gain, for setting and using the same rules as the dynamic range enhancement host rule based module so that an audio signal processed by the client integrated circuit is inversely gained by the dynamic range enhancement gain. 7 . The multichip circuit of claim 6 , wherein the host integrated circuit further comprises a dynamic range enhancement host controller coupled to the dynamic range enhancement host rule based module for controlling the dynamic range enhancement gain and wherein the client integrated circuit further comprises a dynamic range enhancement client controller coupled to the dynamic range enhancement client rule based module for controlling the inverse dynamic range enhancement gain. 8 . A host integrated circuit for use in a multichip circuit for processing audio signals having dynamic range enhancement information over two or more integrated circuits, comprising: a host controller configured to: determine a dynamic range enhancement gain for a digital audio input signal; and process the digital audio input signal in accordance with the dynamic range enhancement gain; and a transmitter configured to transmit audio data based on the processed digital audio input signal to a client integrated circuit coupled to the host integrated circuit, such that the client integrated circuit is provided with the dynamic range enhancement gain in order to process the audio data with the dynamic range enhancement gain. 9 . The host integrated circuit of claim 8 , wherein the host integrated circuit is further configured to transmit dynamic range enhancement information to the client integrated circuit and in order to provide the client integrated circuit with the dynamic range enhancement gain. 10 . The host integrated circuit of claim 9 , wherein the host controller further controls and enhances a dynamic range of the digital audio input signal by the dynamic range enhancement gain in order that the client integrated circuit controls and processes the audio data into an audio signal so that the audio signal is inversely gained by the dynamic range enhancement gain. 11 . The host integrated circuit of claim 9 , wherein: the host controller controls and enhances the dynamic range of the digital audio input signal by the dynamic range enhancement gain by applying a digital gain in accordance with the dynamic range enhancement gain; and the client integrated circuit controls and processes the audio data into the audio signal by applying an analog gain in accordance with an inverse of the dynamic range enhancement gain. 12 . The host integrated circuit of claim 11 , wherein a product of the digital gain and the analog gain approximately equals a constant value. 13 . The host integrated circuit of claim 8 , wherein the host integrated circuit further comprises a dynamic range enhancement host rule based module configured to set rules that determine the dynamic range enhancement gain that is to be applied to the digital audio input signal processed by the host integrated circuit, and wherein the client integrated circuit sets and uses the same rules as the dynamic range enhancement host rule based module so that an audio signal processed by the client integrated circuit is inversely gained by the dynamic range enhancement gain. 14 . The host integrated circuit of claim 11 , wherein the host controller is further configured to control the dynamic range enhancement gain. 15 . A client integrated circuit for use in a multichip circuit for processing audio signals having dynamic range enhancement information over two or more integrated circuits, comprising: a receiver configured to receive audio data from a host integrated circuit in accordance with a dynamic range enhancement gain; and a client controller configured to: determine a dynamic range enhancement gain for a digital audio input signal; and process the audio data in accordance with the dynamic range enhancement gain. 16 . The client integrated circuit of claim 15 , wherein the audio data comprises the dynamic range enhancement gain and the client integrated circuit is configured to extract the dynamic range enhancement gain from the audio data. 17 . The client integrated circuit of claim 16 , wherein the host integrated circuit controls and enhances a dynamic range of a digital audio input signal by the dynamic range enhancement gain to generate the audio data and the client integrated circuit is configured to control and process the audio data into an audio signal so that the audio signal is inversely gained by the dynamic range enhancement gain. 18 . The client integrated circuit of claim 16 , wherein: the host controller controls and enhances the dynamic range of the digital audio input signal by the dynamic range enhancement gain by applying a digital gain in accordance with the dynamic range enhancement gain; and the client integr

Assignees

Inventors

Classifications

  • Synergistic effects of band splitting and sub-band processing · CPC title

  • Aspects of volume control, not necessarily automatic, in sound systems · CPC title

  • H04R3/04Primary

    for correcting frequency response · CPC title

  • H03G7/007Primary

    of digital or coded signals · CPC title

  • Audio streaming, i.e. formatting and decoding of an encoded audio signal representation into a data stream for transmission or storage purposes · CPC title

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What does patent US2016286310A1 cover?
In accordance with embodiments of the present disclosure, a multichip circuit for processing audio signals having dynamic range enhancement information over two or more integrated circuits may include a host integrated circuit and a client integrated circuit. The host integrated circuit may be configured to determine a dynamic range enhancement gain for a digital audio input signal, process the…
Who is the assignee on this patent?
Cirrus Logic Inc
What technology area does this patent fall under?
Primary CPC classification H04R3/04. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Sep 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).