Electrical overstress recording and/or harvesting

US2016285255A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016285255-A1
Application numberUS-201514671767-A
CountryUS
Kind codeA1
Filing dateMar 27, 2015
Priority dateMar 27, 2015
Publication dateSep 29, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.

First claim

Opening claim text (preview).

What is claimed is: 1 . An apparatus comprising: an electrical overstress protection device; a detection circuit electrically coupled to the electrical overstress protection device, the detection circuit configured to detect an occurrence of an electrical overstress event; and a memory configured to store information indicative of the electrical overstress event detected by the detection circuit. 2 . The apparatus of claim 1 , further comprising a resistive element disposed between the electrical overstress protection device and a low reference voltage, the resistive element also disposed between an input of the detection circuit and the low reference voltage reference, wherein the electrical overstress protection device is configured as an electrical overstress sense device. 3 . The apparatus of claim 2 , further comprising a second electrical overstress protection device in parallel with a series combination of the electrical overstress device and the resistive element. 4 . The apparatus of claim 3 , wherein the electrical overstress protection device is a scaled down replica of the second electrical overstress protection device. 5 . The apparatus of claim 1 , wherein the electrical overstress event is an electrostatic discharge event and the electrical overstress protection device is an electrostatic discharge protection device. 6 . The apparatus of claim 1 , further comprising an input pin, an internal circuit, and an electrical overstress isolation device disposed between the input pin and the internal circuit, wherein the electrical overstress protection device is electrically connected to the input pin. 7 . The apparatus of claim 1 , wherein the detection circuit is further configured to detect an intensity of the electrical overstress event and the information indicative of the electrical overstress event comprises an indication of the intensity of the electrical overstress event. 8 . The apparatus of claim 1 , wherein the detection circuit comprises at least one comparator configured to compare a voltage associated with the electrical overstress event with a reference voltage. 9 . The apparatus of claim 1 , wherein the information indicative of the electrical overstress event comprises an indication of a number of electrical overstress events detected by the detection circuit. 10 . The apparatus of claim 1 , further comprising a reporting circuit configured to provide the information indicative of the electrical overstress event to external circuitry. 11 . The apparatus of claim 1 , wherein the memory comprises non-volatile memory elements. 12 . The apparatus of claim 1 , wherein the detection circuit comprises a plurality of fuse elements each configured to blow at different voltage levels, and wherein the memory comprises the plurality of fuse elements. 13 . The apparatus of claim 1 , wherein the electrical overstress device, the detection circuit, and the memory are included within a single package. 14 . The apparatus of claim 1 , further comprising a storage element configured to store energy associated with the electrical overstress event. 15 . An apparatus comprising: an electrical overstress protection device; a detection circuit electrically connected to the electrical overstress protection device, the detection circuit configured to detect an occurrence of an electrical overstress event; and a reporting circuit in communication with the detection circuit, the reporting circuit configured to provide information indicative of the electrical overstress event detected by the detection circuit. 16 . The apparatus of claim 15 , wherein the electrical overstress protection device and the detection circuit are embodied on a single die, and wherein the information indicative of the electrical overstress event is indicative of functional safety of the single die. 17 . The apparatus of claim 15 , wherein the electrical overstress protection device and the detection circuit are embodied on a single die, and wherein the information indicative of the electrical overstress event is indicative of functional safety of an electronic system that includes the single die and other electronic components. 18 . The apparatus of claim 15 , wherein the electrical overstress protection device and the detection circuit are embodied on a single die, and wherein circuitry protected by the electrical overstress protection device is external to the single die. 19 . The apparatus of claim 15 , further comprising: a pin, wherein the electrical overstress protection device is disposed between the pin and the detection circuit; a resistive element in series with the electrical overstress protection device, wherein the detection circuit is electrically connected to a node between the resistive element and the electrical overstress protection device, and wherein the electrical overstress protection device is configured as an electrical overstress sense device; and a second electrical overstress protection device in parallel with a series combination of the resistive element and the electrical overstress protection device. 20 . The apparatus of claim 15 , further comprising a storage element configured to store energy associated with the electrical overstress event. 21 . The apparatus of claim 15 , wherein the reporting circuit is configured to wirelessly transmit the information indicative of the electrical overstress event. 22 . An electronically-implemented method of recording information associated with an electrical overstress event, the method comprising: detecting, using detection circuitry electrically connected to an electrical overstress protection device, an occurrence of an electrical overstress event; and recording information associated with the occurrence of the electrical overstress event to a memory. 23 . The method of claim 22 , further comprising reporting the information associated with the occurrence of the electrical overstress event external to a die on which the detection circuit is embodied. 24 . The method of claim 22 , wherein the information associated with the occurrence of the electrical overstress event comprises information indicative of an intensity of the electrical overstress event.

Assignees

Inventors

Classifications

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • between stacked chips · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

  • Die-attach connectors and bond wires · CPC title

  • between stacked chips · CPC title

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Frequently asked questions

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What does patent US2016285255A1 cover?
Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative…
Who is the assignee on this patent?
Analog Devices Global
What technology area does this patent fall under?
Primary CPC classification H02H9/042. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Sep 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).