Semiconductor device and method of manufacturing the same

US2016284828A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016284828-A1
Application numberUS-201615048193-A
CountryUS
Kind codeA1
Filing dateFeb 19, 2016
Priority dateMar 24, 2015
Publication dateSep 29, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device of an embodiment includes a first layer, a second layer provided on the first layer, the second layer forming a two-dimensional electron gas in the first layer; a source electrode provided on the second layer, a drain electrode provided on the second layer, a gate electrode provided between the source electrode and the drain electrode on the second layer and a first insulating layer provided between the gate electrode and the drain electrode on the second layer. The first insulating layer includes a first film, a second film having a higher oxygen density than the first film and a first region provided between the first film and the second film. The first region contains at least one first element selected from the group consisting of F, H, and D, the first region having a first peak of concentration of the first element.

First claim

Opening claim text (preview).

What is claimed is: 1 . A semiconductor device comprising: a first layer; a second layer provided on the first layer, the second layer configured to form a two-dimensional electron gas in the first layer; a source electrode provided on the second layer; a drain electrode provided on the second layer; a gate electrode provided between the source electrode and the drain electrode on the second layer; and a first insulating layer provided between the gate electrode and the drain electrode on the second layer, the first insulating layer including: a first film; a second film having a higher oxygen density than the first film; and a first region provided between the first film and the second film, the first region containing at least one first element selected from the group consisting of F (fluorine), H (hydrogen), and D (deuterium), the first region having a first peak of concentration of the first element. 2 . The device according to claim 1 , wherein the first layer and the second layer are GaN-based semiconductors, and the second layer has a wider bandgap than a bandgap of the first layer. 3 . The device according to claim 1 , wherein the first layer and the second layer are oxides. 4 . The device according to claim 1 , wherein a full width at half maximum of the first peak is 1 nm or smaller. 5 . The device according to claim 1 , wherein maximum concentration of the first element at the first peak is not lower than 4×10 19 cm −3 and not higher than 6.4×10 22 cm −3 . 6 . The device according to claim 1 , wherein each of the first film and the second film includes a material selected from the group consisting of silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, hafnium aluminum oxide, zirconium aluminum oxide, hafnium silicate, and zirconium silicate. 7 . The device according to claim 1 , wherein an amount of negative fixed charge in the first region is 1/10 or less of an amount of positive fixed charge in the first region. 8 . The device according to claim 1 , further comprising a second insulating layer provided between the second layer and the gate electrode, the second insulating layer including: a third film; a fourth film having a higher oxygen density than the third film; and a second region provided between the third film and the fourth film, the second region containing at least one second element selected from the group consisting of N (nitrogen), P (phosphorus), As (arsenic), Sb (antimony), and Bi (bismuth), the second region having a second peak of concentration of the second element. 9 . The device according to claim 8 , wherein a full width at half maximum of the second peak is 1 nm or smaller. 10 . The device according to claim 8 , wherein maximum concentration of the second element at the second peak is not lower than 4×10 19 cm −3 and not higher than 6.4×10 22 cm −3 . 11 . The device according to claim 8 , wherein an amount of positive fixed charge in the second region is 1/10 or less of an amount of negative fixed charge in the second region. 12 . The device according to claim 8 , wherein each of the third film and the fourth film includes a material selected from the group consisting of silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, hafnium aluminum oxide, zirconium aluminum oxide, hafnium silicate, and zirconium silicate. 13 . The device according to claim 8 , wherein the first film and the third film are made of the same material, and the second film and the fourth film are made of the same material. 14 . A semiconductor device comprising: a first layer; a second layer provided on the first layer, the second layer configured to form a two-dimensional electron gas in the first layer; a source electrode provided on the second layer; a drain electrode provided on the second layer; a gate electrode provided between the source electrode and the drain electrode on the second layer; and an insulating layer provided between the second layer and the gate electrode, the insulating layer including: a first film; a second film having a higher oxygen density than the first film; and a region provided between the first film and the second film, the region containing at least one element selected from the group consisting of N (nitrogen), P (phosphorus), As (arsenic), Sb (antimony), and Bi (bismuth), the region having a peak of concentration of the element. 15 . The device according to claim 14 , wherein the first layer and the second layer are GaN-based semiconductors, and the second layer has a wider bandgap than a bandgap of the first layer. 16 . The device according to claim 14 , wherein the first layer and the second layer are oxides. 17 . The device according to claim 14 , wherein a full width at half maximum of the peak is 1 nm or smaller. 18 . The device according to claim 14 , wherein maximum concentration of the element at the peak is not lower than 4 ×10 19 cm −3 and not higher than 6.4×10 22 cm −3 . 19 . A method of manufacturing a semiconductor device, comprising: forming a first film on a second layer provided on a first layer, the second layer configured to form a two-dimensional electron gas in the first layer; introducing, into a predetermined region of the first film, at least one element selected from the group consisting of N (nitrogen), P (phosphorus), As (arsenic), Sb (antimony), and Bi (bismuth); introducing, into a region of the first film other than the predetermined region, at least one element selected from the group consisting of F (fluorine), H (hydrogen), and D (deuterium); forming a second film on the first film, the second film having a higher oxygen density than the first film; and forming a gate electrode on the predetermined region of the second film. 20 . The method according to claim 19 , wherein the first layer and the second layer are GaN-based semiconductors, and the second layer has a wider bandgap than a bandgap of the first layer.

Assignees

Inventors

Classifications

  • within recesses in the substrate, e.g. trench gates, groove gates or buried gates · CPC title

  • Nitride Group III-V materials, e.g. AlN or GaN · CPC title

  • PN junction isolations · CPC title

  • characterised by the materials · CPC title

  • comprising metallic compounds, e.g. metal oxides or metal silicates  (insulators comprising nitrogen H10D64/693) · CPC title

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What does patent US2016284828A1 cover?
A semiconductor device of an embodiment includes a first layer, a second layer provided on the first layer, the second layer forming a two-dimensional electron gas in the first layer; a source electrode provided on the second layer, a drain electrode provided on the second layer, a gate electrode provided between the source electrode and the drain electrode on the second layer and a first insul…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10D30/475. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Sep 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).