Iii-v compound and germanium compound nanowire suspension with germanium-containing release layer

Patent metadata

Field	Value
Publication number	US-2016284805-A1
Application number	US-201615181680-A
Country	US
Kind code	A1
Filing date	Jun 14, 2016
Priority date	Mar 24, 2015
Publication date	Sep 29, 2016
Grant date	—

Abstract

A device that includes: a substrate layer; a first set of source/drain component(s) defining an nFET (n-type field-effect transistor) region; a second set of source/drain component(s) defining a pFET (p-type field-effect transistor) region; a first suspended nanowire, at least partially suspended over the substrate layer in the nFET region and made from III-V material; and a second suspended nanowire, at least partially suspended over the substrate layer in the pFET region and made from Germanium-containing material. In some embodiments, the first suspended nanowire and the second suspended nanowire are fabricated by adding appropriate nanowire layers on top of a Germanium-containing release layer, and then removing the Germanium-containing release layers so that the nanowires are suspended.

First claim

1 - 18 . (canceled)

19 . A semiconductor device comprising:
a substrate layer; a first set of source/drain component(s) defining an nFET (n-type field-effect transistor) region in the substrate layer; a second set of source/drain component(s) defining a pFET (p-type field-effect transistor) region in the substrate layer; a first suspended nanowire, at least partially suspended over the substrate layer in the nFET region, made from III-V material, and electrically connected to act as a gate for the first set of source/drain component(s); and a second suspended nanowire, at least partially suspended over the substrate layer in the pFET region, made from Silicon-Germanium (SiGe), and electrically connected to act as a gate for the second set of source/drain component(s).

Assignees

• IBM

Inventors

• Cohen Guy M
• Lauer Isaac
• Reznicek Alexander
• Sleight Jeffrey W

Classifications

• H10D30/43

  having one-dimensional [1D] charge carrier gas channels, e.g. quantum wire FETs or transistors having 1D quantum-confined channels · CPC title

• H10D84/0167 Primary

  Manufacturing their channels · CPC title

• H10D84/85

  Complementary IGFETs, e.g. CMOS · CPC title

• H10D84/038

  using silicon technology, e.g. SiGe · CPC title

• H10D84/08

  using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies · CPC title