Method of manufacturing display apparatus and display apparatus manufactured through the method

Patent metadata

Field	Value
Publication number	US-2016284733-A1
Application number	US-201514925644-A
Country	US
Kind code	A1
Filing date	Oct 28, 2015
Priority date	Mar 27, 2015
Publication date	Sep 29, 2016
Grant date	—

Abstract

A method of manufacturing a display apparatus includes: preparing a substrate including a pixel circuit region and a driving circuit region; forming a first active layer at the pixel circuit region; forming a second active layer at the driving circuit region; forming gate electrodes that overlap the first active layer and the second active layer, respectively, with a gate insulating layer disposed therebetween; forming a first insulating layer covering the first and second active layers; forming a first contact hole that passes through the first insulating layer until a portion of the first active layer is exposed; heat-treating the substrate where the first insulating layer, in which the first contact hole is formed, is formed; and forming a second contact hole that passes through the first insulating layer disposed on the heat-treated substrate until a portion of the second active layer is exposed.

First claim

1 . A method of manufacturing a display apparatus, the method comprising the steps of:
preparing a substrate including a pixel circuit region and a driving circuit region; forming a first active layer at the pixel circuit region of the substrate; forming a second active layer at the driving circuit region of the substrate; forming gate electrodes that overlap the first active layer and the second active layer, respectively, with a gate insulating layer disposed therebetween; forming a first insulating layer on the substrate so as to cover the first active layer and the second active layer; forming a first contact hole that passes through the first insulating layer until a portion of the first active layer, among the first active layer and the second active layer, is exposed; heat-treating the substrate where the first insulating layer, having the first contact hole passing through it, is formed; and forming a second contact hole that passes through the first insulating layer disposed on the heat-treated substrate until a portion of the second active layer is exposed.

2 . The method of claim 1 , wherein the first active layer and the second active layer are formed during a same mask process, and comprise a same material.

3 . The method of claim 1 , wherein a hydrogen concentration of the first active layer that is adjacent to the first contact hole is less than a hydrogen concentration of the second active layer that is adjacent to the second contact hole.

4 . The method of claim 1 , wherein a hydrogen concentration of a first part of the first insulating layer that is adjacent to the first contact hole is less than a hydrogen concentration of a second part of the first insulating layer that is adjacent to the second contact hole.

5 . The method of claim 1 , wherein:
the gate insulating layer is disposed between the first and second active layers and the first insulating layer; and each of the first contact hole and the second contact hole passes through the gate insulating layer and the first insulating layer.

6 . The method of claim 5 , wherein a hydrogen concentration of a first part of the gate insulating layer that is adjacent to the first contact hole is less than a hydrogen concentration of a second part of the gate insulating layer that is adjacent to the second contact hole.

7 . The method of claim 1 , further comprising the step of doping the first active layer and the second active layer with same impurities.

8 . A display apparatus, comprising:
a substrate including a pixel circuit region and a driving circuit region; a first thin film transistor disposed in the pixel circuit region of the substrate and comprising a first active layer, a first gate electrode, a first source electrode, and a first drain s electrode; a display device connected to one of the first source electrode and the first drain electrode; a second thin film transistor disposed in the driving circuit region of the substrate and comprising a second active layer, a second gate electrode, a second source electrode, and a second drain electrode; and a first insulating layer covering the first active layer and the second active layer; wherein the first insulating layer includes a first contact hole that exposes a portion of the first active layer, and a second contact hole that exposes a portion of the second active layer; and wherein the first active layer and the second active layer comprise a same material, and a hydrogen concentration of a first part of the first active layer that is adjacent to the first contact hole is less than a hydrogen concentration of a second part of the second active layer that is adjacent to the second contact hole.

9 . The apparatus of claim 8 , wherein a hydrogen concentration of a first part of the first insulating layer that is adjacent to the first contact hole is less than a hydrogen concentration of a second part of the first insulating layer that is adjacent to the second contact hole.

10 . The apparatus of claim 8 , further comprising:
a gate insulating layer disposed between the first and second active layers and the first insulating layer; wherein each of the first contact hole and the second contact hole passes through the gate insulating layer and the first insulating layer.

11 . The apparatus of claim 10 , wherein a hydrogen concentration of a first part of the gate insulating layer that is adjacent to the first contact hole is less than a hydrogen concentration of a second part of the gate insulating layer that is adjacent to the second contact hole.

12 . The apparatus of claim 8 , wherein:
the first active layer includes a source region and a drain region doped with first impurities, the second active layer includes a source region and a drain region doped with second impurities, and the first impurities are of same materials as the second impurities.

13 . The apparatus of claim 8 , further comprising the first active layer and the second active layer doped with the same impurities.

Assignees

• Samsung Display Co Ltd

Inventors

• Lee Jaehyun

Classifications

• H10D86/481

  integrated with passive devices, e.g. auxiliary capacitors · CPC title

• H10D86/451

  characterised by the compositions or shapes of the interlayer dielectrics · CPC title

• H10D86/0231

  using masks, e.g. half-tone masks · CPC title

• H10D86/0223

  comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials · CPC title

• H10D30/6746

  Amorphous silicon · CPC title