Semiconductor device

Patent metadata

Field	Value
Publication number	US-2016284618-A1
Application number	US-201514926805-A
Country	US
Kind code	A1
Filing date	Oct 29, 2015
Priority date	Mar 25, 2015
Publication date	Sep 29, 2016
Grant date	—

Abstract

A semiconductor device includes: a resin case that houses a semiconductor element; a parallel plate that is disposed inside the resin case while being connected with the semiconductor element, the parallel plate including two flat plates parallel to each other with an insulating material therebetween; and two electrodes that are each led out from an upper end of the parallel plate and are disposed on an upper surface of the resin case at a predetermined interval. Upper end portions of the two flat plates of the parallel plate between two electrode lead-out portions are bent toward the outside being a direction in which the upper end portions of the two flat plates become more distant from each other, the two electrodes being led out from the corresponding two electrode lead-out portions.

First claim

What is claimed is:

1 . A semiconductor device, comprising:
a resin case that houses a semiconductor element; a parallel plate that is disposed inside said resin case while being connected with said semiconductor element, said parallel plate including two flat plates parallel to each other with an insulating material therebetween; and two electrodes that are each led out from an upper end of said parallel plate and are disposed on an upper surface of said resin case at a predetermined interval, wherein upper end portions of said two flat plates of said parallel plate between two electrode lead-out portions are bent toward the outside being a direction in which the upper end portions of said two flat plates become more distant from each other, said two electrodes being led out from said corresponding two electrode lead-out portions.

2 . A semiconductor device, comprising:
a resin case that houses a semiconductor element; a parallel plate that is disposed inside said resin case while being connected with said semiconductor element, said parallel plate including two flat plates parallel to each other with an insulating material therebetween; and two electrodes that are each led out from an upper end of said parallel plate and are disposed on an upper surface of said resin case at a predetermined interval, wherein a distance between upper portions of said two flat plates of said parallel plate between two electrode lead-out portions is greater than a distance between portions except for the upper portions between said two electrode lead-out portions, said two electrodes being led out from said corresponding two electrode lead-out portions.

3 . The semiconductor device according to claim 2 , wherein
the upper portion of at least one of said two flat plates of said parallel plate between said two electrode lead-out portions includes a projecting portion that projects to the outside being a direction in which the upper portions of said two flat plates become more distant from each other, and said projecting portion includes a dividing portion that divides said projecting portion into a plurality of portions.

4 . The semiconductor device according to claim 2 , wherein
the upper portion of at least one of said two flat plates of said parallel plate between said two electrode lead-out portions includes a projecting portion that projects to the outside being a direction in which the upper portions of said two flat plates become more distant from each other, and said projecting portion is formed by drawing.

5 . The semiconductor device according to claim 2 , wherein the upper portions of both of said two flat plates of said parallel plate between said two electrode lead-out portions each include a projecting portion that projects to the outside being a direction in which the upper portions of said two flat plates become more distant from each other.

6 . The semiconductor device according to claim 1 , wherein a region corresponding to a portion between said two electrode lead-out portions on the upper surface of said resin case is formed in a planar shape.

7 . The semiconductor device according to claim 2 , wherein a region corresponding to a portion between said two electrode lead-out portions on the upper surface of said resin case is formed in a planar shape.

8 . The semiconductor device according to claim 1 . wherein a region of the upper surface of said resin case corresponding to a portion between said two electrode lead-out portions is located in a height position between upper surfaces of said two electrodes and lower surfaces of said two electrodes.

9 . The semiconductor device according to claim 2 , wherein a region of the upper surface of said resin case corresponding to a portion between said two electrode lead-out portions is located in a height position between upper surfaces of said two electrodes and lower surfaces of said two electrodes.

Assignees

• Mitsubishi Electric Corp

Inventors

• Tsukamoto Hideki
• Tabata Mituharu

Classifications

• H10W44/501

  Inductive arrangements (H10W44/20 takes precedence) · CPC title

• H10W42/20

  protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons · CPC title

• H10W76/153 Primary

  having interconnections in passages through the insulating or insulated base · CPC title

• H10W70/20 Primary

  Conductive package substrates serving as an interconnection, e.g. metal plates (leadframes H10W70/40) · CPC title

• H01L23/055 Primary

  Electricity · mapped topic