Pixel circuit and display panel
US-2024428730-A1 · Dec 26, 2024 · US
US2016284267A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016284267-A1 |
| Application number | US-201514924556-A |
| Country | US |
| Kind code | A1 |
| Filing date | Oct 27, 2015 |
| Priority date | Mar 23, 2015 |
| Publication date | Sep 29, 2016 |
| Grant date | — |
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An organic light-emitting diode (OLED) display and a method of manufacturing thereof are disclosed. In one aspect, the display includes a scan line formed over a substrate and configured to provide a scan signal. An initialization voltage line has substantially the same pattern as the scan line and is insulated from the scan line. A data line crosses the scan line and is configured to provide a data voltage. A switching transistor is electrically connected to the scan line and the data line, and a driving transistor is electrically connected to the switching transistor and includes a driving gate electrode. A storage capacitor includes a first storage electrode and a second storage electrode overlapping the first storage electrode, wherein the first storage electrode and the driving gate electrode are integrally formed.
Opening claim text (preview).
What is claimed is: 1 . An organic light-emitting diode (OLED) display, comprising: a substrate including a pixel area configured to display an image and a peripheral area surrounding the pixel area; a scan line formed over the substrate and configured to provide a scan signal; an initialization voltage line having substantially the same pattern as the scan line and insulated from the scan line; a data line crossing the scan line and configured to provide a data voltage; a driving voltage line crossing the scan line and configured to provide a driving voltage; a switching transistor electrically connected to the scan line and the data line; a driving transistor electrically connected to the switching transistor and including a driving gate electrode; a storage capacitor including a first storage electrode and a second storage electrode overlapping the first storage electrode, wherein the first storage electrode and the driving gate electrode are integrally formed, and wherein the second storage electrode extends from the driving voltage line; and an OLED electrically connected to the driving transistor, wherein the initialization voltage line is configured provide an initialization voltage to initialize the driving transistor, and wherein the initialization voltage line exposes at least a first portion of the scan line in the peripheral area. 2 . The OLED display of claim 1 , further comprising: a first gate insulating layer formed over the substrate; and a second gate insulating layer formed over a second portion of the scan line formed over the first gate insulating layer, wherein the initialization voltage line is formed over the second gate insulating layer. 3 . The OLED display of claim 2 , further comprising an interlayer insulating layer formed over the second gate insulating layer and the initialization voltage line, wherein the second storage electrode, the driving voltage line, and the data line are formed over the interlayer insulating layer. 4 . The OLED display of claim 1 , wherein the driving voltage line includes a first driving voltage line substantially parallel to the data line and a second driving voltage line crossing the data line, wherein the first driving voltage line is formed on the same layer as the data line, and wherein the second driving voltage line is formed on a different layer than the scan line. 5 . The OLED display of claim 4 , wherein the OLED includes: a pixel electrode electrically connected to the driving transistor; an organic emission layer formed over the pixel electrode; and a common electrode formed over the organic emission layer, wherein the second driving voltage line is formed on the same layer as the pixel electrode. 6 . The OLED display of claim 4 , further comprising: a previous scan line formed on the same layer as the scan line and configured to provide a previous scan signal; and a floating transistor formed in the peripheral area and configured to be turned on based on the previous scan signal so as to provide the initialization voltage. 7 . The OLED display of claim 6 , further comprising a peripheral initialization connecting member connecting the drain electrode of the floating transistor to the initialization voltage line, wherein the peripheral initialization connecting member is formed on the same layer as the data line. 8 . The OLED display of claim 1 , further comprising a semiconductor formed over the substrate and including a switching channel of the switching transistor and a driving channel of the driving transistor electrically separated from each other, wherein the driving channel overlaps the driving gate electrode, and wherein the driving channel is curved. 9 . A method for manufacturing an organic light-emitting diode display comprising: sequentially depositing a first gate insulating layer, a first gate metal layer, a second gate insulating layer, and a second gate metal layer over a substrate; etching the first gate metal layer and second gate metal layer with a first half-tone mask to concurrently form a scan line, a first storage electrode, and an initialization voltage line; forming an interlayer insulating layer over the initialization voltage line and the second gate insulating layer; forming a data line, a first driving voltage line, and a second storage electrode over the interlayer insulating layer; forming a passivation layer over the data line, the first driving voltage line, and the second storage electrode; and forming an OLED over the passivation layer, wherein a portion of the initialization voltage line formed over the scan line is formed having substantially the same pattern as the scan line. 10 . The method of claim 9 , wherein the substrate includes a pixel area configured to display an image and a peripheral area surrounding the pixel area, and wherein the etching includes: forming a first photosensitive film in a region corresponding to the scan line of the pixel area; forming a second photosensitive film in a region corresponding to the driving gate electrode and a region corresponding to a portion of the scan line of the peripheral area with a second half-tone mask; concurrently etching the first gate metal layer and the second gate metal layer with the first photosensitive film and the second photosensitive film as an etching mask to form the scan line and the initialization voltage line having substantially the same pattern; removing the second photosensitive film; and etching the second gate metal layer with the first photosensitive film as an etching mask to etch a portion of the initialization voltage line formed in the peripheral area. 11 . The method of claim 10 , wherein the thickness of the first photosensitive film is greater than the thickness of the second photosensitive film. 12 . The method of claim 10 , wherein forming the OLED includes: forming a pixel electrode over the passivation layer; forming an organic emission layer over the pixel electrode; and forming a common electrode on the organic emission layer, wherein a second driving voltage line crossing the first driving voltage line is formed during the forming of the pixel electrode, and wherein the first driving voltage line and the second driving voltage line are electrically connected to each other. 13 . The method of claim 12 , wherein the second driving voltage line and the pixel electrode are formed on the same layer. 14 . The method of claim 12 , wherein the second driving voltage line and the scan line are formed on different layers. 15 . An organic light-emitting diode (OLED) display, comprising: a substrate; a driving voltage line formed over the substrate and configured to provide a driving voltage; a storage capacitor including a first storage electrode and a second storage electrode overlapping the first storage electrode, wherein the second storage electrode extends from the driving voltage line; a driving transistor electrically connected to a data line and the driving voltage line and including a driving gate electrode, wherein the first storage electrode and the driving gate electrode are integrally formed; and an OLED electrically connected to the driving transistor and including a pixel electrode, wherein the driving voltage line includes a first driving voltage line and a second driving voltage line formed over the first driving voltage line, and wherein the second driving voltage line is formed on the same layer as the pixel electrode. 16 . The OLED display of claim 15 , wherein the substrate includes a pixel area and
Interconnections, e.g. scanning lines · CPC title
wherein the TFTs are in active matrices · CPC title
integrated with passive devices, e.g. auxiliary capacitors · CPC title
comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title
having a particular composition, shape or crystalline structure of the active layer · CPC title
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