Accessing global data from accelerator devices

Patent metadata

Field	Value
Publication number	US-2016283158-A1
Application number	US-201514667760-A
Country	US
Kind code	A1
Filing date	Mar 25, 2015
Priority date	Mar 25, 2015
Publication date	Sep 29, 2016
Grant date	—

Abstract

An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the device memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.

First claim

1 - 8 . (canceled)

9 . A system comprising:
a memory having computer readable instructions; and one or more processors for executing the computer readable instructions, the computer readable instructions comprising: receiving, at an accelerator device, a table of contents (TOC) generated by a compiler, the TOC including an address of global data in a host memory space; copying the global data from the address in the host memory space to an address in the device memory space, the address in the host memory space obtained from the received TOC; updating the received TOC to indicate that the global data is stored at the address in the device memory space; executing a kernel that accesses the global data from the address in the device memory space, the address in the device memory space obtained from the updated TOC; and based on the executing of the kernel completing, copying the global data from the address in the device memory space to the address in the host memory space.

10 . The system of claim 9 , wherein the computer readable instructions further comprise restoring the TOC to the received TOC.

11 . The system of claim 10 , wherein the computer readable instructions further comprise deallocating a memory location associated with the address in the device memory space, the deallocating responsive to the restoring.

12 . The system of claim 9 , wherein the compiler generates one TOC per accelerator device.

13 . The system of claim 9 , wherein the receiving is performed during link-time.

14 . The system of claim 9 , wherein the copying the global data from the address in the host memory space to an address in the device memory space, updating, and copying the global data from the address in the device memory space to the address in the host memory space are performed during run-time.

15 . The system of claim 9 , wherein the accelerator device is an active memory cube (AMC).

16 . The system of claim 9 , wherein the receiving is during run-time, the compiler generates one TOC per kernel, the TOC further includes local data, and the method further comprises deleting the TOC based on the executing of the kernel completing.

17 . A computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:
receiving, at an accelerator device, a table of contents (TOC) generated by a compiler, the TOC including an address of global data in a host memory space; copying the global data from the address in the host memory space to an address in the device memory space, the address in the host memory space obtained from the received TOC; updating the received TOC to indicate that the global data is stored at the address in the device memory space; executing a kernel that accesses the global data from the address in the device memory space, the address in the device memory space obtained based on contents of the updated TOC; and based on the executing of the kernel completing, copying the global data from the address in the device memory space to the address in the host memory space.

18 . The computer program product of claim 17 , wherein the method further comprises restoring the TOC to the received TOC.

19 . The computer program product of claim 18 , wherein the method further comprises deallocating a memory location associated with the address in the device memory space, the deallocating responsive to the restoring.

20 . The computer program product of claim 17 , wherein the receiving is performed during link-time, and the copying the global data from the address in the host memory space to an address in the device memory space, updating, and copying the global data from the address in the device memory space to the address in the host memory space are performed during run-time.

Assignees

• IBM

Inventors

• Bertolli Carlo
• O'Brien John K
• Sallenave Olivier H
• Sura Zehra N

Classifications

• G06F3/0673

  Single storage device · CPC title

• G06F3/0619 Primary

  in relation to data integrity, e.g. data losses, bit errors · CPC title

• G06F3/065

  Replication mechanisms · CPC title

• G06F3/068

  Hybrid storage device · CPC title

• G06F3/0604

  Improving or facilitating administration, e.g. storage management · CPC title