Computer memory data security

Patent metadata

Field	Value
Publication number	US-2016283151-A1
Application number	US-201514665029-A
Country	US
Kind code	A1
Filing date	Mar 23, 2015
Priority date	Mar 23, 2015
Publication date	Sep 29, 2016
Grant date	—

Abstract

A memory module determines that the memory module is connected to a memory module connector. The memory module receives the connector ID from the connector and communicates, to the connector, a memory module ID associated with the memory module. A connector-module ID token is generated using the connector ID and the memory module ID. It is determined that the connector-module ID token was not received from the connector within a predetermined time window. Data on the memory module is erased in response to not receiving the connector-module ID.

First claim

What is claimed is:

1 . A method for protecting memory data, the method comprising:
determining, by a memory module, that the memory module is connected to a memory module connector; receiving, at the memory module, a connector ID from the connector; communicating, to the connector, a memory module ID associated with the memory module; generating a connector-module ID token using the connector ID and the memory module ID; determining the connector-module ID token was not received from the connector within a predetermined time window; and erasing, in response to the determining the connector-module ID token was not received, data on the memory module.

2 . The method of claim 1 , wherein the predetermined time window includes a first time window and one or more retry time windows.

3 . The method of claim 1 , wherein the memory module is a DIMM.

4 . The method of claim 1 , wherein the erasing data comprises erasing an ECC DRAM.

5 . The method of claim 1 , wherein the erasing data comprises driving a predetermined pattern on one or more data DRAMs.

6 . The method of claim 1 , wherein the connector ID is generated during startup of a system comprising the connector.

7 . A computer program product for protecting memory data, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, wherein the computer readable storage medium is not a transitory signal per se, the program instructions executable by a computer to cause the computer to perform a method comprising:
determining, by a memory module, that the memory module is connected to a memory module connector; receiving, at the memory module, a connector ID from the connector; communicating, to the connector, a memory module ID associated with the memory module; generating a connector-module ID token using the connector ID and the memory module ID; determining the connector-module ID token was not received from the connector within a predetermined time window; and erasing, in response to the determining the connector-module ID token was not received, data on the memory module.

8 . The computer program product of claim 7 , wherein the predetermined time window includes a first time window and one or more retry time windows.

9 . The computer program product of claim 7 , wherein the memory module is a DIMM.

10 . The computer program product of claim 7 , wherein the erasing data comprises erasing an ECC DRAM.

11 . The computer program product of claim 7 , wherein the erasing data comprises driving a predetermined pattern on one or more data DRAMs.

12 . The computer program product of claim 7 , wherein the connector ID is generated during startup of a system comprising the connector.

13 . A memory module comprising:
one or more memory chips; a transceiver configured to communicate with a memory module connector; and an erase controller configured to:
detect that the transceiver failed to receive a connector-module ID token within a predetermined time window, the connector-module ID token generated using a connector ID and a memory module ID; and
erase, in response to detecting that the transceiver failed to receive the connector-module ID token, data on at least one of the one or more memory chips.

14 . The memory module of claim 13 , wherein the erase controller is configured to erase data by driving predetermined patterns to the at least one of the one or more memory chips.

15 . The memory module of claim 13 , wherein the at least one of the one or more memory chips is an ECC DRAM.

16 . The memory module of claim 13 , further comprising:
a backup battery configured to provide power to circuitry on the memory module, the circuitry including the erase controller.

17 . The memory module of claim 13 , wherein the one or more memory chips are DRAM chips.

Assignees

• IBM

Inventors

• Chinnakkonda Vidyapoornachary Diyanesh B
• Laning Ray C
• Sawan Tony E

Classifications

• G06F3/0622 Primary

  in relation to access · CPC title

• G06F3/0637

  Permissions · CPC title

• G06F3/0679

  Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP] · CPC title

• G06F3/0652

  Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket · CPC title

• G06F3/0688

  Non-volatile semiconductor memory arrays · CPC title