Enhanced capacitance touch screen display and methods for use therewith
US-2024411406-A1 · Dec 12, 2024 · US
US2016283000A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016283000-A1 |
| Application number | US-201414442791-A |
| Country | US |
| Kind code | A1 |
| Filing date | Oct 11, 2014 |
| Priority date | May 20, 2014 |
| Publication date | Sep 29, 2016 |
| Grant date | — |
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The present invention provides a touch display panel and a display device. The touch display panel includes a substrate, which is provided thereon with a common electrode layer, a thin film transistor, and a data line and a pixel electrode connected with the thin film transistor. The common electrode layer includes a touch driving electrode and a common electrode which are insulated and spaced apart from each other. The array substrate further includes a shielding layer, which shields a spacing region between the touch driving electrode and the common electrode corresponding to position of the data line, thereby greatly reducing noise generated when the source and the data line are being charged, and in turn enabling the touch and the display of the touch display panel to be performed simultaneously.
Opening claim text (preview).
1 - 11 . (canceled) 12 . A touch display panel, including an array substrate, the array substrate includes a substrate, which is provided thereon with a common electrode layer, a thin film transistor, and a data line and a pixel electrode connected with the thin film transistor, the common electrode layer including a touch driving electrode and a common electrode which are insulated and spaced apart from each other, and in a display period of one frame, the touch driving electrode is loaded with a common electrode signal and a touch driving signal in a time-sharing manner, wherein the array substrate further includes a shielding layer, and the shielding layer shields a spacing region between the touch driving electrode and the common electrode corresponding to position of the data line. 13 . The touch display panel according to claim 12 , wherein the shielding layer is located above and/or below the common electrode layer. 14 . The touch display panel according to claim 12 , wherein the shielding layer is loaded with a common electrode signal. 15 . The touch display panel according to claim 13 , wherein the shielding layer is loaded with a common electrode signal. 16 . The touch display panel according to claim 14 , wherein the thin film transistor includes a source, a drain, a gate and an active layer, the source and the drain being provided, in the same layer, above the active layer and being located at both ends of the active layer respectively; the gate is provided above the source and the drain; each of the pixel electrode and the common electrode layer is located above the thin film transistor, and the pixel electrode is connected with the drain; the source and the data line are provided in the same layer and are connected with each other. 17 . The touch display panel according to claim 15 , wherein the thin film transistor includes a source, a drain, a gate and an active layer, the source and the drain being provided, in the same layer, above the active layer and being located at both ends of the active layer respectively; the gate is provided above the source and the drain; each of the pixel electrode and the common electrode layer is located above the thin film transistor, and the pixel electrode is connected with the drain; the source and the data line are provided in the same layer and are connected with each other. 18 . The touch display panel according to claim 16 , wherein the shielding layer and the gate are provided in the same layer. 19 . The touch display panel according to claim 17 , wherein the shielding layer and the gate are provided in the same layer. 20 . The touch display panel according to claim 18 , wherein the shielding layer and the gate are formed simultaneously by using the same material. 21 . The touch display panel according to claim 19 , wherein the shielding layer and the gate are formed simultaneously by using the same material. 22 . The touch display panel according to claim 16 , wherein the pixel electrode is located above the common electrode layer, and the shielding layer and the pixel electrode are provided in the same layer. 23 . The touch display panel according to claim 17 , wherein the pixel electrode is located above the common electrode layer, and the shielding layer and the pixel electrode are provided in the same layer. 24 . The touch display panel according to claim 16 , wherein the pixel electrode is located below the common electrode layer, and the shielding layer and the pixel electrode are provided in the same layer. 25 . The touch display panel according to claim 17 , wherein the pixel electrode is located below the common electrode layer, and the shielding layer and the pixel electrode are provided in the same layer. 26 . The touch display panel according to claim 22 , wherein the shielding layer and the pixel electrode are formed simultaneously by using the same material. 27 . The touch display panel according to claim 24 , wherein the shielding layer and the pixel electrode are formed simultaneously by using the same material. 28 . The touch display panel according to claim 16 , wherein the array substrate further includes a black matrix, the black matrix being located below the active layer and the black matrix shielding the active layer completely. 29 . The touch display panel according to claim 17 , wherein the array substrate further includes a black matrix, the black matrix being located below the active layer and the black matrix shielding the active layer completely. 30 . A display device, including the touch display panel according to claim 12 .
Shielding in digitiser, i.e. guard or shielding arrangements, mostly for capacitive touchscreens, e.g. driven shields, driven grounds · CPC title
Digitisers structurally integrated in a display · CPC title
using a single layer of sensing electrodes · CPC title
Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means · CPC title
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