Memory type designation and/or verification system

US2016276785A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016276785-A1
Application numberUS-201514661730-A
CountryUS
Kind codeA1
Filing dateMar 18, 2015
Priority dateMar 18, 2015
Publication dateSep 22, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A memory DIMM (dual in-line memory module) installation verification system for a server system is provided. The system includes a bank of memory slots including a plurality of memory sockets. The system further includes a circuit including wiring connecting at least one switch to each of the memory sockets with direct connections to respective lights within a bank of lights associated with each of the plurality of memory sockets.

First claim

Opening claim text (preview).

What is claimed: 1 . A system, comprising: a bank of memory slots comprising a plurality of memory sockets; and a circuit comprising wiring connecting at least one switch to each of the memory sockets with direct connections to respective lights within a bank of lights associated with each of the plurality of memory sockets. 2 . The system of claim 1 , wherein at least one light in each bank of lights illuminates upon insertion of a memory into a memory socket of the plurality of memory sockets. 3 . The system of claim 1 , wherein the each light in the bank of lights is grounded and the at least one switch is at least two switches. 4 . The system of claim 1 , wherein the circuit is designed and configured to designate that a dual in-line memory module (DIMM) plugged into a memory socket of the plurality of memory sockets is of a certain type. 5 . The system of claim 4 , wherein the circuit is designed and configured to illuminate a single light in each of the bank of lights when a DIMM is plugged into the memory socket of the plurality of memory sockets is of the certain type. 6 . The system of claim 4 , wherein the circuit is designed and configured to verify that multiple DIMMs plugged into multiple memory sockets of the plurality of memory sockets are of a same type. 7 . The system of claim 6 , wherein the circuit is designed and configured to illuminate a single light in each of the bank of lights when multiple DIMMs plugged into the multiple memory sockets of the plurality of memory sockets are of the same type. 8 . The system of claim 6 , wherein the circuit is designed and configured to illuminate plural lights in each of the bank of lights when multiple DIMMs plugged into the multiple memory sockets of the plurality of memory sockets are of a different type. 9 . The system of claim 8 , wherein each light in the bank of lights is of a different color designating a different parameter of a memory plugged into the memory socket. 10 . The system of claim 9 , wherein the different parameter is at least a speed of the memory and a size of the memory. 11 . The system of claim 1 , wherein each light of a same color in each bank of lights is connected to a same wiring and each of the memory sockets. 12 . The system of claim 1 , wherein the circuit is designed and configured to verify that memory modules of identical size, type, banking and stacking technology, and/or vendor are installed in a server system eliminating any potential functionality issues which can otherwise result in mixed memories installed in the same server system. 13 . A system, comprising: a plurality of memory sockets; a bank of lights adjacent to each of the memory slots of the plurality of memory slots, wherein each light in each bank of lights designates a parameter of a memory plugged into a memory socket of the plurality of memory sockets; and a circuit comprising wiring connecting at least one switch to each of the memory sockets with direct connections to each of the lights within the bank of lights, wherein the wiring further connects lights across the bank of lights such that upon insertion of memory into one memory socket of the plurality of memory sockets a same type of light in each of the bank of lights illuminates. 14 . The system of claim 13 , wherein each of the lights in each of the bank of lights designate that a dual in-line memory module (DIMM) plugged into a memory socket of the plurality of memory sockets has certain characteristics or parameters. 15 . The system of claim 14 , wherein the circuit is designed and configured to verify that multiple DIMMs plugged into multiple memory sockets of the plurality of memory sockets are of a same type by illumination of a single light in each of the bank of lights. 16 . The system of claim 14 , wherein the circuit is designed and configured to illuminate different lights in each of the bank of lights when multiple DIMMs plugged into the multiple memory sockets of the plurality of memory sockets are of a different type. 17 . The system of claim 13 , wherein each light of a same color in each bank of lights is connected to a same wiring and each of the memory sockets. 18 . The system of claim 13 , wherein the circuit is designed and configured to verify that memory modules of identical size, type, banking and stacking technology, and/or vendor are installed in a server system eliminating any potential functionality issues which can otherwise result in mixed memories installed in the same server system. 19 . A system, comprising: a plurality of memory sockets corresponding to a bank of memory; a plurality of lights adjacent to each memory socket of the plurality of memory sockets, wherein each light of the plurality of lights corresponds to a parameter of a memory plugged into each memory socket of the plurality of memory sockets; and a circuit comprising at least one switch and wiring, the wiring: connecting the at least one switch to each of the memory sockets; connecting each of the memory sockets to each of the lights of the plurality of lights adjacent to the memory socket; and connecting lights across different memory sockets, which designate a same memory parameter, wherein a particular set of lights illuminate when a dual in-line memory module (DIMM) plugged into a memory socket of the plurality of memory sockets has a certain characteristic or parameter that matches to the set of lights. 20 . The system of claim 19 , wherein the circuit is designed and configured to: verify that multiple DIMMs plugged into multiple memory sockets are of a same type by illumination of a single light adjacent to each of the memory sockets; and illuminate different lights in each of the bank of lights when multiple DIMMs plugged into the multiple memory sockets are of a different type.

Assignees

Inventors

Classifications

  • G11C5/04Primary

    Supports for storage elements {, e.g. memory modules}; Mounting or fixing of storage elements on such supports · CPC title

  • Coupling parts adapted for simultaneous co-operation with two or more identical counterparts, e.g. for distributing energy to two or more circuits (supported only by co-operation with a counterpart H01R31/00; with a holder adapted for supporting apparatus to which its counterpart is attached H01R33/88) · CPC title

  • Light emitting diodes (LEDs) · CPC title

  • for connection between PCB and component, e.g. display · CPC title

  • Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory · CPC title

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What does patent US2016276785A1 cover?
A memory DIMM (dual in-line memory module) installation verification system for a server system is provided. The system includes a bank of memory slots including a plurality of memory sockets. The system further includes a circuit including wiring connecting at least one switch to each of the memory sockets with direct connections to respective lights within a bank of lights associated with eac…
Who is the assignee on this patent?
Lenovo Entpr Solutions Singapore Pte Ltd
What technology area does this patent fall under?
Primary CPC classification G11C5/04. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Sep 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).