Semiconductor device structure with raised source/drain having cap element

US2016276481A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016276481-A1
Application numberUS-201514658688-A
CountryUS
Kind codeA1
Filing dateMar 16, 2015
Priority dateMar 16, 2015
Publication dateSep 22, 2016
Grant date

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  1. Title

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Abstract

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Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a source/drain structure adjacent to the gate stack. The semiconductor device structure also includes a cap element over the source/drain structure. The cap element has a top surface and a side surface. A width ratio of the top surface to the side surface of the cap element is in a range from about 0.125 to about 1.

First claim

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1 . A semiconductor device structure, comprising: a gate stack over a semiconductor substrate; a source/drain structure adjacent to the gate stack; and a cap element over the source/drain structure, wherein the cap element has a top surface and a side surface, and a width ratio of the top surface to the side surface of the cap element is in a range from about 0.125 to about 1. 2 . The semiconductor device structure as claimed in claim 1 , wherein the top surface of the cap element is substantially parallel to a top surface of the source/drain structure, and the side surface of the cap element is substantially parallel to a side surface of the source/drain structure. 3 . The semiconductor device structure as claimed in claim 1 , wherein: the cap element has a first thickness substantially equal to a distance between the top surface of the cap element and a top surface of the source/drain structure, the cap element has a second thickness substantially equal to a distance between the side surface of the cap element and a side surface of the source/drain structure, and a ratio of the first thickness to the second thickness is in a range from about 0.8 to about 1.2. 4 . The semiconductor device structure as claimed in claim 1 , wherein the cap element comprises silicon, silicon germanium, or a combination thereof. 5 . The semiconductor device structure as claimed in claim 1 , wherein a surface orientation of the top surface of the cap element is {311}, and a surface orientation of the side surface of the cap element is {111}. 6 . The semiconductor device structure as claimed in claim 1 , wherein the source/drain structure is in direct contact with the cap element. 7 . The semiconductor device structure as claimed in claim 1 , wherein the source/drain structure comprises a lower portion and an upper portion between the lower portion and the cap element, and compositions of the lower portion and the upper portion are different. 8 . The semiconductor device structure as claimed in claim 7 , wherein an atomic concentration of germanium in the upper portion is greater than an atomic concentration of germanium in the lower portion. 9 . The semiconductor device structure as claimed in claim 8 , wherein the atomic concentration of germanium in the lower portion is greater than an atomic concentration of germanium in the cap element. 10 . The semiconductor device structure as claimed in claim 1 , further comprising: a second source/drain structure adjacent to the source/drain structure; and a second cap element over the second source/drain structure, wherein a ratio of a shortest distance between the cap element and the second cap element to a width of the top surface of the cap element is in a range from about 0.6 to about 0.8. 11 . A semiconductor device structure, comprising: a gate stack over a semiconductor substrate; a source/drain structure adjacent to the gate stack; and a cap element over the source/drain structure, wherein: the cap element has a first thickness substantially equal to a distance between a top surface of the cap element and a top surface of the source/drain structure, the cap element has a second thickness substantially equal to a distance between a side surface of the cap element and a side surface the source/drain structure, and a ratio of the first thickness to the second thickness is in a range from about 0.8 to about 1.2. 12 . The semiconductor device structure as claimed in claim 11 , wherein the source/drain structure is in direct contact with the cap element. 13 . The semiconductor device structure as claimed in claim 11 , wherein the cap element comprises silicon, silicon germanium, or a combination thereof. 14 . The semiconductor device structure as claimed in claim 11 , wherein a surface orientation of the top surface of the cap element is {311}, and a surface orientation of the side surface of the cap element is {111}. 15 . The semiconductor device structure as claimed in claim 11 , wherein the source/drain structure comprises silicon germanium. 16 - 20 . (canceled) 21 . The semiconductor device structure as claimed in claim 11 , wherein the cap element contains substantially no germanium. 22 . The semiconductor device structure as claimed in claim 11 , further comprising a metal silicide feature directly on the cap element. 23 . A semiconductor device structure, comprising: a gate stack over a semiconductor substrate; a source/drain structure adjacent to the gate stack; and a cap element over the source/drain structure, wherein the cap element has a first top plane, the source/drain structure has a second top plane, and the first top plane of the cap element is wider than the second top plane of the source/drain structure. 24 . The semiconductor device structure as claimed in claim 23 , wherein the first top plane of the cap element is substantially parallel to the second top plane of the source/drain structure. 25 . The semiconductor device structure as claimed in claim 23 , wherein the source/drain structure has an atomic concentration of germanium greater than an atomic concentration of germanium of the cap element.

Assignees

Inventors

Classifications

  • Silicon, silicon germanium or germanium · CPC title

  • of Group IV materials · CPC title

  • using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials · CPC title

  • using chemical vapour deposition [CVD] · CPC title

  • using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes · CPC title

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What does patent US2016276481A1 cover?
Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a gate stack over a semiconductor substrate and a source/drain structure adjacent to the gate stack. The semiconductor device structure also includes a cap element over the source/drain structure. The cap element has a top surface and a side surface. A width ratio of th…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd, Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D62/151. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Sep 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).