Nonvolatile semiconductor memory device

Patent metadata

Field	Value
Publication number	US-2016276353-A1
Application number	US-201514816431-A
Country	US
Kind code	A1
Filing date	Aug 3, 2015
Priority date	Mar 18, 2015
Publication date	Sep 22, 2016
Grant date	—

Abstract

A stacked body is disposed so as cover a periphery of a semiconductor columnar portion and includes a conductive layer and an inter-layer insulating layer stacked alternately in a stacking direction on a semiconductor substrate. An epitaxial layer is disposed on a surface of the semiconductor substrate and is electrically connected to a lower end of the semiconductor columnar portion. The semiconductor columnar portion comprises: an insulating film core; and a semiconductor portion disposed so as to cover a periphery of the insulating film core and electrically connected to the epitaxial layer at a lower end portion. The epitaxial layer includes a concave portion in a surface thereof, and the insulating film core has a lower end thereof positioned inside the concave portion.

First claim

What is claimed is:

1 . A nonvolatile semiconductor memory device, comprising:
a semiconductor substrate; a semiconductor columnar portion extending in a perpendicular direction to the semiconductor substrate; a memory gate insulating layer covering a side surface of the semiconductor columnar portion; a stacked body disposed so as cover a periphery of the semiconductor columnar portion and including a conductive layer and an inter-layer insulating layer stacked alternately in a stacking direction on the semiconductor substrate; and an epitaxial layer disposed on a surface of the semiconductor substrate and disposed so as to be electrically connected to a lower end of the semiconductor columnar portion, the semiconductor columnar portion comprising: an insulating film core; and a semiconductor portion disposed so as to cover a periphery of the insulating film core and electrically connected to the epitaxial layer at a lower end portion, the epitaxial layer including a concave portion in a surface thereof, and the insulating film core having a lower end thereof positioned inside the concave portion.

2 . The nonvolatile semiconductor memory device according to claim 1 , wherein
the semiconductor portion is disposed at a position between the epitaxial layer and the insulating film core, inside the concave portion.

3 . The nonvolatile semiconductor memory device according to claim 2 , wherein
the semiconductor portion includes polysilicon.

4 . The nonvolatile semiconductor memory device according to claim 1 , wherein
the semiconductor portion has a crystalline structure which differs from that of the epitaxial layer.

5 . The nonvolatile semiconductor memory device according to claim 1 , wherein
the epitaxial layer includes monocrystalline silicon disposed continuously from monocrystalline silicon configuring the semiconductor substrate.

6 . The nonvolatile semiconductor memory device according to claim 5 , wherein
the semiconductor portion includes polysilicon.

7 . The nonvolatile semiconductor memory device according to claim 1 , further comprising:
a select transistor formed at the lower end of the semiconductor columnar portion, wherein a gate electrode of one of the select transistors includes the plurality of conductive layers, and the insulating film core has an end portion at a position of at least one of the plurality of conductive layers.

8 . The nonvolatile semiconductor memory device according to claim 7 , wherein
the semiconductor portion is disposed at a position between the epitaxial layer and the insulating film core, inside the concave portion.

9 . The nonvolatile semiconductor memory device according to claim 1 , further comprising:
a select transistor disposed below the semiconductor columnar portion, wherein a gate electrode of one of the select transistors includes the plurality of conductive layers, and the insulating film core has an end portion at a position of the lowermost layer conductive layer of the plurality of conductive layers.

10 . The nonvolatile semiconductor memory device according to claim 9 , wherein
the semiconductor portion is disposed at a position between the epitaxial layer and the insulating film core, inside the concave portion.

11 . The nonvolatile semiconductor memory device according to claim 1 , further comprising:
a solid phase epitaxial layer disposed between the epitaxial layer and the insulating film core and disposed continuously from the epitaxial layer, inside the concave portion.

12 . The nonvolatile semiconductor memory device according to claim 11 , wherein
the semiconductor portion includes polysilicon.

13 . A nonvolatile semiconductor memory device, formed by:
forming a stacked body on a semiconductor substrate, the stacked body having a plurality of conductive layers stacked therein sandwiching an inter-layer insulating film; forming a first hole that penetrates the stacked body and reaches the semiconductor substrate; forming an epitaxial layer in a bottom of the first hole; forming a memory gate insulating film on a side surface of the first hole, the memory gate insulating film including a charge accumulation layer; forming a concave portion in a surface of the epitaxial layer; and forming a semiconductor layer and an insulating layer in the first hole including inside the concave portion, the insulating layer being formed also inside the concave portion.

14 . The nonvolatile semiconductor memory device according to claim 13 , wherein
the semiconductor layer is formed by depositing polysilicon.

15 . The nonvolatile semiconductor memory device according to claim 13 , wherein
the epitaxial layer is polycrystallized by depositing amorphous silicon and then executing annealing processing.

16 . The nonvolatile semiconductor memory device according to claim 13 , wherein
the nonvolatile semiconductor memory device comprises a select transistor disposed at a lower end of the semiconductor layer, a gate electrode of one of the select transistors includes the plurality of conductive layers, and the insulating layer is disposed so as to reach at least one of the plurality of conductive layers.

17 . The nonvolatile semiconductor memory device according to claim 13 , wherein
the semiconductor layer is disposed inside the concave portion by solid phase epitaxial growth using the epitaxial layer as an underlayer.

18 . The nonvolatile semiconductor memory device according to claim 17 , wherein
the semiconductor layer is disposed by depositing polysilicon.

Assignees

• Toshiba Kk

Inventors

• Kobayashi Shigeki
• Sakamoto Kei
• Okawa Takamasa
• SAWABE Ryosuke

Classifications

• H01L27/1157 Primary

  Electricity · mapped topic

• H01L27/11578

  Electricity · mapped topic

• H01L27/11551

  Electricity · mapped topic

• H01L27/11524

  Electricity · mapped topic

• H10B41/27

  the channels comprising vertical portions, e.g. U-shaped channels · CPC title