Semiconductor device structure and method for forming the same

Patent metadata

Field	Value
Publication number	US-2016276271-A1
Application number	US-201514658525-A
Country	US
Kind code	A1
Filing date	Mar 16, 2015
Priority date	Mar 16, 2015
Publication date	Sep 22, 2016
Grant date	—

Abstract

A semiconductor device structure is provided. The semiconductor device structure includes a substrate. The semiconductor device structure includes a dielectric layer over the substrate. The dielectric layer has a trench. The semiconductor device structure includes a conductive line in the trench. The conductive line has a first end portion and a second end portion. The first end portion faces the substrate. The second end portion faces away from the substrate. A first width of the first end portion is greater than a second width of the second end portion.

First claim

What is claimed is:

1 . A semiconductor device structure, comprising:
a substrate; a dielectric layer over the substrate, wherein the dielectric layer has a trench; and a conductive line in the trench, wherein the conductive line has a first end portion and a second end portion, the first end portion faces the substrate, the second end portion faces away from the substrate, and a first width of the first end portion is greater than a second width of the second end portion.

2 . The semiconductor device structure as claimed in claim 1 , further comprising:
a conductive via structure penetrating into the dielectric layer under the conductive line and connected to the first end portion.

3 . The semiconductor device structure as claimed in claim 2 , wherein the second width of the second end portion is greater than a third width of the conductive via structure.

4 . The semiconductor device structure as claimed in claim 1 , wherein the first end portion has a curved sidewall.

5 . The semiconductor device structure as claimed in claim 4 , wherein the first end portion has an upper portion and a lower portion, and a third width of the upper portion increases in a direction toward the substrate.

6 . The semiconductor device structure as claimed in claim 5 , wherein the third width of the upper portion continuously increases in the direction toward the substrate.

7 . The semiconductor device structure as claimed in claim 5 , wherein a fourth width of the lower portion decreases in the direction toward the substrate.

8 . The semiconductor device structure as claimed in claim 1 , wherein the first end portion has a planar sidewall.

9 . The semiconductor device structure as claimed in claim 1 , wherein the first width of the first end portion increases in a direction toward the substrate.

10 . A semiconductor device structure, comprising:
a substrate; a dielectric layer over the substrate, wherein the dielectric layer has a trench, the trench has a first portion and a second portion over the first portion, and a first width of the first portion is greater than a second width of the second portion; and a conductive line filled in the trench.

11 . The semiconductor device structure as claimed in claim 10 , wherein the first portion is adjacent to the substrate, and the second portion is adjacent to an upper surface of the dielectric layer.

12 . The semiconductor device structure as claimed in claim 10 , wherein the trench has a first inner wall, and the first inner wall has a first recess facing the first portion.

13 . The semiconductor device structure as claimed in claim 12 , wherein the trench further has a second inner wall opposite to the first inner wall, the second inner wall has a second recess opposite to the first recess, and the first portion is between the first recess and the second recess.

14 . The semiconductor device structure as claimed in claim 12 , wherein the first recess has a curved inner wall.

15 . The semiconductor device structure as claimed in claim 12 , wherein the first recess has a planar inner wall.

16 . A method for forming a semiconductor device structure, comprising:
forming a dielectric layer over a substrate; forming a first trench in the dielectric layer, wherein the first trench has a first portion and a second portion over the first portion, and a first width of the first portion is greater than a second width of the second portion; and filling a conductive material into the first trench.

17 . The method for forming a semiconductor device structure as claimed in claim 16 , wherein the formation of the first trench comprises:
forming a mask layer over the dielectric layer, wherein the mask layer has a second trench exposing a portion of the dielectric layer; and performing a dry etching process to remove the portion of the dielectric layer.

18 . The method for forming a semiconductor device structure as claimed in claim 17 , wherein the dry etching process comprises a plasma etching process.

19 . The method for forming a semiconductor device structure as claimed in claim 16 , further comprising:
during the formation of the first trench, forming a via hole in the dielectric layer under the trench, wherein the via hole is connected to the trench; and during the filling of the conductive material into the first trench, filling the conductive material into the via hole.

20 . The method for forming a semiconductor device structure as claimed in claim 19 , wherein the second width of the second portion is greater than a third width of the via hole.

Assignees

• Taiwan Semiconductor Mfg Co Ltd
• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Chen Wei-Ting
• Chang Che-Cheng
• Lu Chen-Hsiang
• Liu Yu-Cheng

Classifications

• H10P50/287

  by chemical means · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/73 Primary

  using masks for insulating materials · CPC title

• H10W20/075

  of multilayered thin functional dielectric layers · CPC title

• H10W20/089

  using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title