Semiconductor device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-2016276174-A1
Application number	US-201615041649-A
Country	US
Kind code	A1
Filing date	Feb 11, 2016
Priority date	Mar 18, 2015
Publication date	Sep 22, 2016
Grant date	—

Abstract

A method for manufacturing a semiconductor device and a semiconductor device produced thereby. For example and without limitation, various aspects of this disclosure provide a method for manufacturing a semiconductor device, and a semiconductor device produced thereby, that comprises an interposer without through silicon vias.

First claim

What is claimed is:

1 . A method of manufacturing a semiconductor package, the method comprising:
providing a carrier structure comprising:
a carrier; and
a carrier dielectric layer on the carrier;
forming an interposer structure on a first side of the carrier structure, the interposer structure comprising:
an interposer dielectric layer; and
an interposer conductive layer;
after said forming an interposer structure, removing the carrier from the carrier structure; and attaching a semiconductor die to the interposer structure.

2 . The method of claim 1 , wherein:
the carrier structure is on a first side of the interposer structure; and said attaching a semiconductor die to the interposer structure comprises, after said removing the carrier from the carrier structure, attaching the semiconductor die on the first side of the interposer structure.

3 . The method of claim 1 , wherein after said attaching a semiconductor die to the interposer structure, the carrier dielectric layer is between the semiconductor die and the interposer structure.

4 . The method of claim 1 , comprising:
forming an opening through the carrier dielectric layer to expose the interposer conductive layer; and forming a conductive interconnection structure, a first end of which directly contacts the interposer conductor layer, and a second end of which comprises a die interconnection pad.

5 . The method of claim 1 , wherein the carrier comprises a silicon carrier.

6 . The method of claim 5 , wherein the carrier dielectric layer comprises an inorganic dielectric layer, and the interposer dielectric layer comprises an organic dielectric layer.

7 . The method of claim 6 , wherein the interposer conductive layer has a finer pitch than a second interposer conductive layer.

8 . The method of claim 1 , wherein said removing the carrier comprises mechanically grinding the carrier.

9 . The method of claim 1 , wherein the carrier comprises one or more of: glass, ceramic, and/or metal.

10 . A method of manufacturing a semiconductor package, the method comprising:
providing a carrier structure comprising:
carrier; and
a carrier dielectric layer on the carrier;
forming a first interposer structure on a first side of the carrier structure, the interposer structure comprising:
a first interposer dielectric layer; and
a first interposer conductive layer;
after said forming a first interposer structure, removing the carrier from the carrier structure; attaching a semiconductor die to the first interposer structure; and forming a second interposer structure on a second side of the carrier structure opposite the first side of the carrier structure.

11 . The method of claim 10 , comprising attaching package interconnection structures to the second interposer structure.

12 . The method of claim 10 , wherein the first carrier dielectric layer is between the first interposer structure and the second interposer structure.

13 . The method of claim 10 , wherein said forming a first interposer structure is performed before said attaching a semiconductor die, and said forming a second interposer structure is performed after said attaching a semiconductor die.

14 . The method of claim 10 , wherein the carrier comprises a silicon carrier.

15 . The method of claim 10 , wherein the first interposer dielectric layer comprises an organic dielectric layer.

16 . A method of manufacturing a semiconductor package, the method comprising:
providing a carrier structure comprising:
a carrier; and
a first carrier dielectric layer on the carrier;
forming a first interposer structure on a first side of the carrier structure, the interposer structure comprising:
a first interposer dielectric layer; and
a first interposer conductive layer;
after said forming a first interposer structure, removing the carrier from the carrier structure; and attaching a semiconductor die to the first interposer structure, wherein the first interposer structure is between the semiconductor die and the first carrier dielectric layer.

17 . The method of claim 16 , wherein said removing the carrier is performed after said attaching a semiconductor die.

18 . The method of claim 16 , comprising after said removing the carrier:
forming an aperture through the first carrier dielectric layer; and connecting a conductive interconnection structure to the first interposer conductive layer through the aperture.

19 . The method of claim 16 , wherein the carrier comprises a silicon carrier.

20 . The method of claim 16 , wherein the first carrier dielectric layer comprises an inorganic dielectric layer and the first interposer dielectric layer comprises an organic dielectric layer.

Assignees

• Amkor Technology Inc

Inventors

• Kim Dong Jin
• Kim Jin Han
• Do Won Chul Do
• Bae Jae Hun Bae
• Ki Won Myoung
• Han Dong Hoon
• Kim Do Hyung
• Lee Ji Hun
• Park Jun Hwan
• Son Seung Nam
• Cho Hyun
• Zwenger Curtis

Classifications

• H10W70/6565

  recessed into the surface of the package substrates, interposers, or redistribution layers · CPC title

• H10P72/7448

  the bond interface between the auxiliary support and the wafer comprising two or more, e.g. multilayer adhesive or adhesive and release layer · CPC title

• H10W99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10W74/10

  characterised by their shape or disposition · CPC title

• H10W74/142

  the encapsulations exposing the passive side of the semiconductor body · CPC title