Display device, optical mask, and method for manufacturing display device using the same

US2016274402A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016274402-A1
Application numberUS-201514857209-A
CountryUS
Kind codeA1
Filing dateSep 17, 2015
Priority dateMar 19, 2015
Publication dateSep 22, 2016
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Exemplary embodiments relate to a display device, an optical mask, and a method for manufacturing a display device using the same. The display device including: a first substrate and a second substrate facing the first substrate; a thin film transistor disposed on the first substrate; a first insulating layer disposed on the thin film transistor; and a light blocking member disposed on the first insulating layer. The light blocking member includes a spacer for maintaining a cell gap between the first substrate and the second substrate and a main light blocking portion having an upper surface that is lower than an upper surface of the spacer, and the light blocking member further includes a furrow at a border between the spacer and the main light blocking portion, the furrow having a surface lower than the upper surface of the main light blocking portion.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display device comprising: a first substrate and a second substrate facing the first substrate; a thin film transistor disposed on the first substrate; a first insulating layer disposed on the thin film transistor; and a light blocking member disposed on the first insulating layer, wherein the light blocking member includes a spacer for maintaining a cell gap between the first substrate and the second substrate and a main light blocking portion having an upper surface that is lower than an upper surface of the spacer, and wherein the light blocking member further comprises a furrow at a border between the spacer and the main light blocking portion, the furrow having a surface lower than the upper surface of the main light blocking portion. 2 . The display device of claim 1 , wherein: a depth of the furrow is equal to or less than about 25% of a thickness of the main light blocking portion with reference to the upper surface of the main light blocking portion. 3 . The display device of claim 2 , wherein: the furrow has a closed curve surrounding the spacer. 4 . The display device of claim 3 , wherein: a width of the spacer is about 5 μm to about 15 μm. 5 . The display device of claim 4 , further comprising: a signal line connected to the thin film transistor, wherein the spacer overlaps at least one of the thin film transistor and the signal line. 6 . The display device of claim 5 , wherein: the main light blocking portion overlaps at least a portion of the signal line. 7 . The display device of claim 1 , further comprising: a pixel electrode disposed on the thin film transistor and connected to the thin film transistor, wherein the light blocking member is disposed on the pixel electrode. 8 . A method for manufacturing a display device, comprising: forming a thin film transistor on a first substrate; forming a first insulating layer on the thin film transistor; and coating a light blocking material layer on the first insulating layer and exposing the light blocking material layer using an optical mask, wherein the optical mask includes: an island-type first region for transmitting at least a portion of light: a plurality of ring-type opaque regions provided around the first region and separated from each other: and a second region provided between the plurality of ring-type opaque regions and transmitting at least a portion of light. 9 . The method of claim 8 , wherein: widths of the ring-type opaque regions and a width of the second region are greater than 0 μm and equal to or less than about 2 μm, respectively. 10 . The method of claim 9 , wherein: the optical mask further includes a half-tone region provided outside the plurality of ring-type opaque regions and transmitting a portion of light. 11 . The method of claim 10 , wherein: the ring-type opaque regions and the second region form a closed curve, respectively. 12 . The method of claim 11 , wherein: the first region is a transparent region having a higher light transmission ratio than the half-tone region; and a width of the transparent region is about 5 μm to about 15 μm. 13 . The method of claim 10 , wherein: the first region is a transparent region having a higher light transmission ratio than the half-tone region, and the second region is the a half-tone region that transmits a portion of light. 14 . The method of claim 10 , wherein: the first region and the second region are half-tone regions that transmit a portion of light. 15 . The method of claim 10 , further comprising: forming a main light blocking portion corresponding to the half-tone region by exposing the light blocking material layer using the optical mask; forming a spacer corresponding to the first region by exposing the light blocking material layer using the optical mask; and forming a furrow corresponding to the plurality of ring-type opaque regions and the second region by exposing the light blocking material layer using the optical mask, the furrow having a surface lower than an upper surface of the main light blocking portion. 16 . The method of claim 15 , wherein: a depth of the furrow is equal to or less than about 25% of a thickness of the main light blocking portion with reference to the upper surface of the main light blocking portion. 17 . An optical mask for manufacturing a display device, comprising: an island-type first region configured to transmit at least a portion of light; a plurality of ring-type opaque regions provided around the island-type first region and separated from each other; and a second region provided between the plurality of ring-type opaque regions and configured to transmit at least a portion of light. 18 . The optical mask of claim 17 , wherein: widths of the ring-type opaque regions and a width of the second region are greater than 0 μm and equal to or less than about 2 μm, respectively. 19 . The optical mask of claim 18 , wherein: the optical mask further includes a half-tone region provided outside the plurality of ring-type opaque regions and configured to transmit a portion of light. 20 . The optical mask of claim 19 , wherein: the first region is a transparent region having a higher light transmission ratio than the half-tone region, and the second region is configured to transmit a portion of light. 21 . The optical mask of claim 19 , wherein: the first region and the second region are half-tone regions configured to transmit a portion of light.

Assignees

Inventors

Classifications

  • using masks, e.g. half-tone masks · CPC title

  • wherein the TFTs are in active matrices · CPC title

  • characterised by multiple TFTs · CPC title

  • spacers regularly patterned on the cell subtrate, e.g. walls, pillars (G02F1/133377 takes precedence) · CPC title

  • Physics · mapped topic

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2016274402A1 cover?
Exemplary embodiments relate to a display device, an optical mask, and a method for manufacturing a display device using the same. The display device including: a first substrate and a second substrate facing the first substrate; a thin film transistor disposed on the first substrate; a first insulating layer disposed on the thin film transistor; and a light blocking member disposed on the firs…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification G02F1/13394. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Sep 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).