Cell placement optimization
US-2024371942-A1 · Nov 7, 2024 · US
US2016268371A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016268371-A1 |
| Application number | US-201514844278-A |
| Country | US |
| Kind code | A1 |
| Filing date | Sep 3, 2015 |
| Priority date | Mar 10, 2015 |
| Publication date | Sep 15, 2016 |
| Grant date | — |
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According to one embodiment, a semiconductor device includes a semiconductor substrate made of a first semiconductor material, an element isolation insulating film, a gate electrode film, source/drain regions, a channel region, and a diffusion preventing film. The channel region is provided near a surface of the semiconductor substrate below the gate electrode film, and containing a second impurity of a predetermined conductivity type diffused therein. The diffusion preventing film is provided at an interface between the element isolation insulating film and the semiconductor substrate, and made of a second semiconductor material different from the first semiconductor material.
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What is claimed is: 1 . A semiconductor device comprising: a semiconductor substrate made of a first semiconductor material; an element isolation insulating film having a predetermined depth and partitioning a predetermined element formation region of a main surface on one side of the semiconductor substrate; a gate electrode film provided through a gate insulating film above the semiconductor substrate within the element formation region and extending in a first direction; source/drain regions provided near a surface of the semiconductor substrate respectively on both sides of the gate electrode film in a second direction perpendicular to the first direction, and containing a first impurity of a predetermined conductivity type diffused therein; a channel region provided near a surface of the semiconductor substrate below the gate electrode film, and containing a second impurity of a predetermined conductivity type diffused therein; and a diffusion preventing film provided at an interface between the element isolation insulating film and the semiconductor substrate, and made of a second semiconductor material different from the first semiconductor material. 2 . The semiconductor device according to claim 1 , wherein the diffusion preventing film is made of the second semiconductor material obtained by doping the first semiconductor material with an element preventing diffusion of the second impurity. 3 . The semiconductor device according to claim 1 , wherein the gate electrode film includes a semiconductor material doped with an N-type impurity, the second impurity is B, and the diffusion preventing film is made of the second semiconductor material doped with C. 4 . The semiconductor device according to claim 3 , wherein the second semiconductor material is doped with C at 1×10 13 to 1×10 16 [cm −2 ]. 5 . The semiconductor device according to claim 1 , further comprising a fixed charge layer provided at an interface between the diffusion preventing film and the element isolation insulating film, wherein the fixed charge layer has a fixed charge of a reverse sign to a fixed charge to be generated in the element isolation insulating film. 6 . The semiconductor device according to claim 5 , wherein the diffusion preventing film is made of the second semiconductor material obtained by doping the first semiconductor material with an element preventing diffusion of the second impurity, and the fixed charge layer contains polyatomic ions including the element preventing diffusion of the second impurity. 7 . The semiconductor device according to claim 1 , wherein the gate electrode film includes a semiconductor material doped with an N-type impurity, the second impurity is B, the diffusion preventing film is made of the second semiconductor material doped with C, and the fixed charge layer contains carbonate ions. 8 . The semiconductor device according to claim 7 , wherein the second semiconductor material is doped with C at 1 at % or more. 9 . The semiconductor device according to claim 5 , wherein the diffusion preventing film is formed of a single-crystalline silicon film doped with C, or a polycrystalline silicon film doped with C. 10 . The semiconductor device according to claim 1 , wherein the diffusion preventing film has a band gap larger than a band gap of the semiconductor substrate. 11 . The semiconductor device according to claim 10 , wherein the first semiconductor material is silicon, and the second semiconductor material is silicon doped with C, or SiC. 12 . A semiconductor device comprising: a semiconductor substrate made of a first semiconductor material; an element isolation insulating film having a predetermined depth and partitioning a predetermined element formation region of a main surface on one side of the semiconductor substrate; a gate electrode film provided through a gate insulating film above the semiconductor substrate within the element formation region and extending in a first direction; source/drain regions provided near a surface of the semiconductor substrate respectively on both sides of the gate electrode film in a second direction perpendicular to the first direction, the source/drain regions being doped with an impurity of a predetermined conductivity type at a first concentration; connection layers respectively provided in the source/drain regions and connectable to contacts, the connection layers being doped with an impurity of the predetermined conductivity type at a second concentration higher than the first concentration; and a semiconductor film provided at an interface between the element isolation insulating film and the semiconductor substrate, and made of a second semiconductor material different from the first semiconductor material, the semiconductor film having a larger band gap as compared with the first semiconductor material. 13 . The semiconductor device according to claim 12 , wherein the first semiconductor material is silicon, and the second semiconductor material is silicon doped with C, or SiC. 14 . A manufacturing method of a semiconductor device, the method comprising: forming a trench in a semiconductor substrate made of a first semiconductor material; forming a second semiconductor film at a region including a side surface of the trench; embedding an element isolation insulating film in the trench; forming a gate insulating film on an element formation region partitioned by the element isolation insulating film; doping the element formation region with a first impurity of a predetermined conductivity type; forming a gate electrode film having a predetermined shape extending in a first direction on the gate insulating film; and forming source/drain regions doped with a second impurity of a predetermined conductivity type, at a region where the gate electrode film is not formed in the element formation region, wherein in the forming of the second semiconductor film, the second semiconductor film containing an element preventing diffusion of the first impurity is formed. 15 . The manufacturing method of a semiconductor device according to claim 14 , wherein in the forming of the second semiconductor film, the second semiconductor film is formed by ion-implanting the element preventing diffusion of the first impurity, into a surface that forms the trench. 16 . The manufacturing method of a semiconductor device according to claim 14 further comprising forming a fixed charge layer on a surface of the second semiconductor film after the forming of the second semiconductor film and before the embedding of the element isolation insulating film, the fixed charge layer having a fixed charge of a reverse sign to a fixed charge to be generated in the element isolation insulating film. 17 . The manufacturing method of a semiconductor device according to claim 16 , wherein the forming of the fixed charge layer includes oxidizing the second semiconductor film by wet oxidation, and thereby forming the fixed charge layer containing polyatomic ions including the element preventing diffusion of the first impurity, between the second semiconductor film and an oxide film formed by oxidizing the second semiconductor film. 18 . The manufacturing method of a semiconductor device according to claim 17 , wherein in the forming of the second semiconductor film, the second semiconductor film is formed by use of a selective epitaxial growth method. 19 . The manufacturing method of a semiconductor device according to claim 17 , wherein
characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221) · CPC title
of electrically inactive species · CPC title
into Group IV semiconductors · CPC title
Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing · CPC title
Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth · CPC title
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