Display device and manufacturing method thereof

US2016268356A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016268356-A1
Application numberUS-201514861904-A
CountryUS
Kind codeA1
Filing dateSep 22, 2015
Priority dateMar 10, 2015
Publication dateSep 15, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display device includes: a first substrate including: a display area including a plurality of pixels, and a peripheral area positioned around the display area; a thin film transistor positioned on the first substrate; a pixel electrode layer positioned on the thin film transistor and including more than one pixel electrodes positioned in the display area; and a pixel definition layer positioned on the pixel electrode layer and including a peripheral portion overlapping a voltage transmission electrode. The peripheral portion includes a spacer and an inclination portion connected to the spacer and positioned at a first side of the spacer, and the inclination portion has a concave inclination surface.

First claim

Opening claim text (preview).

What is claimed is: 1 . A display device comprising: a first substrate including: a display area including a plurality of pixels, and a peripheral area positioned around the display area; a thin film transistor positioned on the first substrate; a pixel electrode layer positioned on the thin film transistor and including a plurality of pixel electrodes positioned in the display area; and a pixel definition layer positioned on the pixel electrode layer and including a peripheral portion overlapping a voltage transmission electrode, wherein the peripheral portion includes: a spacer, and an inclination portion connected to the spacer and positioned at a first side of the spacer, wherein the inclination portion has a concave inclination surface. 2 . The display device of claim 1 , wherein the peripheral portion further includes a main portion connected to the spacer and positioned at a second side opposite to the first side of the spacer. 3 . The display device of claim 2 , further comprising: a second substrate facing the first substrate; and a sealant formed between the first substrate and the second substrate and positioned in the peripheral area, wherein the main portion is positioned at a side facing the sealant. 4 . The display device of claim 3 , wherein a height of a top surface of the spacer with respect to the first substrate is higher than a height of a top surface of the main portion and the inclination portion. 5 . The display device of claim 4 , wherein a thickness of the inclination portion is smaller than a thickness of the main portion. 6 . The display device of claim 5 , wherein a height of a bottom surface of the main portion is lower than a height of a bottom surface of the inclination portion. 7 . The display device of claim 6 , further comprising: a voltage transmission line positioned in the peripheral area and transmitting a common voltage; and a passivation layer positioned between the thin film transistor and the pixel electrode layer, wherein the passivation layer includes an edge side surface exposing the voltage transmission line, and the voltage transmission electrode positioned in the peripheral area includes a first portion covering the edge side surface of the passivation layer and a second portion connected to the voltage transmission line. 8 . The display device of claim 7 , wherein the spacer includes at least one part covering the edge side surface of the passivation layer, and the pixel electrode layer includes the voltage transmission electrode. 9 . The display device of claim 4 , wherein the peripheral portion covers an edge of the voltage transmission electrode. 10 . The display device of claim 1 , wherein an edge of the spacer at the first side has a shape of protrusions and depressions and includes recess portions and convex portions that are alternately arranged. 11 . The display device of claim 10 , wherein the inclination portion includes a plurality of portions positioned in the recess portions in a plan view, and each of the plurality of portions included in the inclination portion has a concave inclination surface. 12 . The display device of claim 11 , wherein the voltage transmission electrode includes a plurality of holes, and each of the plurality of the portions of the inclination portion respectively overlaps each of the holes. 13 . The display device of claim 12 , wherein a hole adjacent to a first hole overlapping the inclination portion among the plurality of holes is disposed to be aligned with the first hole. 14 . The display device of claim 12 , wherein a hole adjacent a first hole overlapping the inclination portion among the plurality of holes is disposed to be shifted from the first hole. 15 . The display device of claim 10 , wherein an edge of the spacer at the first side having the protrusions and depressions shape includes a first convex portion and a second convex portion having different lengths from each other. 16 . The display device of claim 1 , wherein the spacer and the inclination portion are elongated along an edge side of the first substrate. 17 . The display device of claim 16 , wherein the voltage transmission electrode includes a plurality of holes, and the inclination portion overlaps the plurality of the holes. 18 . A method for manufacturing a display device, comprising: forming a thin film transistor on a first substrate including a display area and a peripheral area around the display area; forming, on the thin film transistor, a pixel electrode layer including a plurality of pixel electrodes positioned in the display area; coating a photosensitive material on the pixel electrode layer to form a coating layer; exposing the coating layer by using a photomask including a light transmissive part, a light blocking part, and a semi-transmissive part; developing the exposed coating layer; and hardening the developed coating layer to form a pixel definition layer including a peripheral portion overlapping a voltage transmission electrode, wherein the peripheral portion includes a spacer and an inclination portion connected to the spacer and positioned at a first side of the spacer, and wherein the inclination portion has a concave inclination surface. 19 . The method of claim 18 , wherein the peripheral portion further includes a main portion connected to the spacer and positioned at a second side opposite to the first side of the spacer. 20 . The method of claim 19 , wherein a thickness of the coating layer corresponding to the main portion is thicker than a thickness of the coating layer corresponding to the inclination portion.

Assignees

Inventors

Classifications

  • Vertical spacers, e.g. arranged between the sealing arrangement and the OLED · CPC title

  • Connection of the pixel electrodes to the thin film transistors [TFT] · CPC title

  • H10K59/122Primary

    Pixel-defining structures or layers, e.g. banks · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

Patent family

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Frequently asked questions

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What does patent US2016268356A1 cover?
A display device includes: a first substrate including: a display area including a plurality of pixels, and a peripheral area positioned around the display area; a thin film transistor positioned on the first substrate; a pixel electrode layer positioned on the thin film transistor and including more than one pixel electrodes positioned in the display area; and a pixel definition layer position…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10K59/8723. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Sep 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).