Semiconductor device and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-2016268299-A1
Application number	US-201514850365-A
Country	US
Kind code	A1
Filing date	Sep 10, 2015
Priority date	Mar 13, 2015
Publication date	Sep 15, 2016
Grant date	—

Abstract

According to one embodiment, a semiconductor device includes a stacked body and a pillar. The stacked body includes insulating films, electrode films, and silicon containing films. Each of the insulating films and each of the electrode films are stacked alternately. One of the silicon containing films is provided between one of the insulating films and one of the electrode films. The pillar extends in the stacked body in a stacking direction of the insulating films and the electrode films. The pillar includes a silicon pillar and a memory film. The silicon pillar extends in the stacking direction. The memory film is provided between the silicon pillar and one of the electrode films.

First claim

What is claimed is:

1 . A semiconductor device comprising:
a stacked body, the stacked body including
a plurality of insulating films,
a plurality of electrode films alternately stacked with the insulating layers in a stacked direction, and
a plurality silicon containing films, one of the silicon containing films being provided between one of the insulating films and one of the electrode films;
a pillar extending in the stacked body in the stacking direction, the pillar including
a silicon pillar extending in the stacking direction; and
a memory film provided between the silicon pillar and one of the electrode films.

2 . The device according to claim 1 , wherein one of the silicon containing films include Si 3 N X where X is less than four.

3 . The device according to claim 1 , wherein one of the insulating films contains silicon oxide.

4 . The device according to claim 1 , further comprising:
a bit line connected to a top end of the pillar; and a source line connected to a bottom end of the pillar.

5 . The device according to claim 4 , wherein the source line is provided at an upper layer portion of a substrate disposed under the stacked body.

6 . The device according to claim 4 , wherein
the silicon pillar includes:
a first portion; and
a second portion being in contact with the source line,
the first portion is provided between the second portion and the memory film.

7 . The device according to claim 1 , wherein the pillar further includes a core part provided at a region including a central axis of the pillar, and the core part contains silicon oxide.

8 . The device according to claim 1 , wherein
the memory film includes:
a first insulating film;
a second insulating film provided between the first insulating film and the electrode film and having a dielectric constant higher than a dielectric constant of the first insulating film; and
a charge storage film provided between the first insulating film and the second insulating film.

9 . The device according to claim 8 , further comprising a barrier metal film provided between the second insulating film and the electrode film, and the barrier metal film contains a metal element.

10 . A method for manufacturing a semiconductor device, the method comprising:
forming a stacked body, the stacked body including a first insulating film, a first silicon containing film provided on the first insulating film, a filing film provided on the first silicon containing film, and a second silicon containing film provided on the filing film, the first silicon containing film containing silicon and nitride, the filing film containing silicon and nitride, a silicon concentration in the filing film being lower than a silicon concentration in the first silicon containing film, the second silicon containing film containing silicon and nitride, a silicon concentration in the second silicon containing film being higher than the silicon concentration of the filing film; forming a memory hole penetrating the stacked body in a stacking direction of the first insulating film, the first silicon containing film, the filing film, and the second silicon containing film; forming a charge storage film on a surface of the memory hole; forming a second insulating film on a surface of the charge storage film; forming a semiconductor pillar on a surface of the second insulating film; forming a slit in the stacked body, the slit extending along a plane including the stacking direction; removing the filing film through the slit; forming a third insulating film on the first insulating film, the first silicon containing film, the second silicon containing film and the charge storage film through the slit; depositing a conductive material on the third insulating film and in a space through the slit to form an electrode film, the space being formed after the filing film being removed; and removing a portion of the electrode film adjacent to the slit to divide the electrode film along the stacking direction.

11 . The method according to claim 10 , wherein
the forming the stacked body includes:
forming the first insulating film; and
forming the first silicon containing film, the filing film, and the second silicon containing film by plasma chemical vapor deposition using a first gas containing silicon and a second gas containing nitrogen as source gases; and
a ratio of a flow rate of the first gas to a flow rate of the second gas in the forming the first silicon containing film and in the forming the second silicon containing film is higher than the ratio in the forming the filing film.

12 . The method according to claim 11 , wherein the first gas includes a silicon precursor gas, and the second gas includes an ammonia gas.

13 . The method according to claim 11 , wherein the first gas includes a silicon precursor gas, and the second gas includes a nitrogen gas.

14 . The method according to claim 11 , wherein the first gas includes a silicon precursor gas, and the second gas includes an inert gas other than a nitrogen gas.

15 . The method according to claim 11 , wherein the forming the first insulating film includes depositing silicon oxide by plasma chemical vapor deposition using a gas containing silicon and oxygen as a source gas.

16 . The method according to claim 15 , wherein
the forming the stacked body further includes purging an inside of a chamber with a noble gas between the forming the first insulating film and the forming the first silicon containing film, the plasma chemical vapor deposition is performed in the chamber.

17 . The method according to claim 10 , further comprising:
forming a cover film including an insulating material on a side surface of the memory hole before the forming the charge storage film; and removing a portion of the cover film through the slit, the portion of the cover film is in contact with the filing film after the removing the filing film.

18 . The method according to claim 10 , wherein
the forming the semiconductor pillar includes:
forming a first portion on an inner surface of the memory hole;
removing the first portion, the second insulating film, and the charge storage film from a bottom surface of the memory hole by performing anisotropic etching; and
forming a second portion on the inner surface of the memory hole.

Assignees

• Toshiba Kk

Inventors

• Masuda Hideaki
• Shiba Katsuyasu
• Yamada Nobuhide

Classifications

• H10P50/283

  by chemical means · CPC title

• H10P14/69433

  the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz · CPC title

• H10P14/69215

  the material being a silicon oxide, e.g. SiO2 · CPC title

• H10P14/6336

  in the presence of a plasma [PECVD] · CPC title

• H10D64/037 Primary

  comprising charge-trapping insulators · CPC title