Accurate Current Sensing

Patent metadata

Field	Value
Publication number	US-2016266175-A1
Application number	US-201514864966-A
Country	US
Kind code	A1
Filing date	Sep 25, 2015
Priority date	Mar 12, 2015
Publication date	Sep 15, 2016
Grant date	—

Abstract

A current sense circuit for a pass transistor is described. The circuit comprises a sense transistor having input and control ports that are coupled to input and control ports respectively of the pass transistor. The circuit comprises a differential amplifier comprising a differential input and output. An output port of the pass transistor is coupled to a first port of the differential input and an output port of the sense transistor is coupled to a second port of the differential input. The differential amplifier comprises a first sub-amplifier and a second sub-amplifier that are arranged in parallel and which are operated in an auto-zero phase and in an amplification phase in an alternating manner, and which are operated in the auto-zero phase in a mutually exclusive manner. The output of the differential amplifier is used to control voltage drops across the sense transistor and the pass transistor.

First claim

What is claimed is:

1 ) A current sense circuit for a pass transistor, wherein the current sense circuit comprises,
a sense transistor having an input port that is coupled to an input port of the pass transistor and having a control port that is coupled to a control port of the pass transistor; and a differential amplifier comprising a differential input and an output; wherein an output port of the pass transistor is coupled to a first port of the differential input and wherein an output port of the sense transistor is coupled to a second port of the differential input; wherein the differential amplifier comprises a first sub-amplifier and a second sub-amplifier that are arranged in parallel and which are operated in an auto-zero phase and in an amplification phase in an alternating manner, and which are operated in the auto-zero phase in a mutually exclusive manner; wherein the output of the differential amplifier is used to control a voltage drop across the sense transistor and the pass transistor.

2 ) The current sense circuit of claim 1 , wherein the first sub-amplifier and the second sub-amplifier are operated in the auto-zero phase in a mutually exclusive manner, such that the first sub-amplifier is in the amplification phase, when the second sub-amplifier is in the auto-zero phase, and such that the second sub-amplifier is in the amplification phase, when the first sub-amplifier is in the auto-zero phase.

3 ) The current sense circuit of claim 1 , wherein
the first sub-amplifier and the second sub-amplifier are differential amplifiers with respective differential inputs and with respective outputs; the differential inputs of the first sub-amplifier and the second sub-amplifiers are coupled to one another; and the outputs of the first sub-amplifier and the second sub-amplifiers are coupled to one another.

4 ) The current sense circuit of claim 1 , wherein
the differential amplifier comprises auto-zero capacitors for the first sub-amplifier; the auto-zero capacitors are arranged in series with the input ports of the first sub-amplifier, when the first sub-amplifier is in the auto-zero phase; and the auto-zero capacitors couple the input ports of the first sub-amplifier to ground, when the first sub-amplifier is in the amplification phase.

5 ) The current sense circuit of claim 1 , wherein the alternation of the auto-zero phase and of the amplification phase is controlled using a clock signal.

6 ) The current sense circuit of claim 5 , wherein
the first sub-amplifier comprises switches for switching the first sub-amplifier from the auto-zero phase to the amplification phase, and vice versa; the switches are controlled by the clock signal.

7 ) The current sense circuit of claim 6 , wherein
the differential amplifier comprises a first set of switches and a second set of switches; an auto-zero capacitor is arranged in series with an input port of the first sub-amplifier, when the first set of switches is open and when the second set of switches is closed; and the auto-zero capacitor couples the input port to ground, when the first set of switches is closed and when the second set of switches is open.

8 ) The current sense circuit of claim 1 , wherein
a first offset of the first sub-amplifier is measured, when the first sub-amplifier is in the auto-zero phase; and the first sub-amplifier amplifies the delta voltage using the first offset, when the first sub-amplifier is in the amplification phase.

9 ) The current sense circuit of claim 1 , wherein
the differential amplifier comprises a differential output; and the current sense circuit comprises a differential difference amplifier, referred to as DD amplifier, comprising a main differential input, an auxiliary differential input and an output; wherein the differential output of the differential amplifier is coupled to the auxiliary differential input of the DD amplifier; wherein the output port of the pass transistor is coupled to a first port of the main differential input and wherein the output port of the sense transistor is coupled to a second port of the main differential input; wherein the output of the DD amplifier is used to control the voltage drop across the sense transistor and the pass transistor.

10 ) The current sense circuit of claim 1 , wherein
the current sense circuit comprises an output transistor which is controlled based on the output of the differential amplifier; wherein an output port of the output transistor is coupled to the output port of the sense transistor; and wherein a sense current through the output transistor provides an indication of a current through the pass transistor; and the sense current through the output transistor is fed back to the control ports of the pass transistor and of the sense transistor.

11 ) The current sense circuit of claim 10 , further comprising a current source configured to set a control current; wherein a voltage level at the control ports of the pass transistor and of the sense transistor is dependent on the control current.

12 ) The current sense circuit of claim 10 , further comprising one or more current mirrors for mirroring the sense current to the control ports of the pass transistor and of the sense transistor.

13 ) The current sense circuit of claim 1 , wherein
the pass transistor, the sense transistor and the output transistor are metaloxide semiconductor transistors; the input port of the pass transistor and of the sense transistor is a drain or a source; the output port of the pass transistor, of the sense transistor and of the output transistor is a source or a drain; and the control port of the pass transistor and of the sense transistor is a gate.

14 ) The current sense circuit of claim 1 , wherein a size of the pass transistor is greater than a size of the sense transistor by 2, 3 or more orders of magnitude.

15 ) A method for providing a sense current which is indicative of a current through a pass transistor, the method comprising,
arranging a sense transistor such that an input port of the sense transistor is coupled to an input port of the pass transistor and such that a control port of the sense transistor is coupled to a control port of the pass transistor; amplifying a delta voltage corresponding to a difference between a pass voltage at an output port of the pass transistor and a sense voltage at an output port of the sense transistor using a first differential sub-amplifier; while amplifying the delta voltage using the first differential sub-amplifier, auto-zeroing a second differential sub-amplifier that is arranged in parallel to the first differential sub-amplifier; amplifying the delta voltage using the second differential sub-amplifier; while amplifying the delta voltage using the second differential sub-amplifier, auto-zeroing the first differential sub-amplifier; using the amplified delta voltage to control a voltage drop across the sense transistor and the pass transistor.

16 ) A method for obtaining a sense current for a pass transistor, comprising the steps of:
coupling a sense transistor input port to an input port of the pass transistor and coupling a sense transistor control port to a control port of the pass transistor; and providing a differential amplifier comprising a differential input and an output; wherein an output port of the pass transistor is coupled to a first port of the differential input and wherein an output port of the sense transistor is coupled to a second port of the differential input; wherein the differential amplifier comprises a first sub-amplifier and a

Assignees

• Dialog Semiconductor Uk Ltd

Inventors

• Nizza Nicolo
• Gerna Danilo

Classifications

• G01R19/0092 Primary

  Measuring current only · CPC title

• H03K17/6871

  the output circuit comprising more than one controlled field-effect transistor · CPC title

• H03K2217/0027

  Measuring means of, e.g. currents through or voltages across the switch · CPC title

• H03K2217/0054

  Gating switches, e.g. pass gates · CPC title