Magnetic memory with high thermal budget

US2016254445A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016254445-A1
Application numberUS-201615057109-A
CountryUS
Kind codeA1
Filing dateFeb 29, 2016
Priority dateFeb 27, 2015
Publication dateSep 1, 2016
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A magnetic memory having a base layer with a wetting layer and seed layer is disclosed. The wetting layer and seed layer promotes FCC structure along the (111) orientation to improve PMA. A surface smoother, such as a surfactant layer, is provided between the wetting and seed layers. This enhances the smoothness of the seed layer, resulting in smoother interface in the MTJ stack, which leads to improved thermal endurance.

First claim

Opening claim text (preview).

What is claimed is: 1 . A method of forming a storage unit of a memory cell comprising: forming a bottom electrode; forming a fixed layer disposed over the bottom electrode, wherein the fixed layer comprises a hard layer disposed over a base layer, the base layer promotes face-centered cubic (FCC) structure along (111) orientation to increase perpendicular magnetic anisotropy, the base layer comprises a wetting layer, wherein the wetting layer comprises Mg, the wetting layer promotes FCC structure along (111) orientation, and a seed layer comprising n bilayers which promote FCC structure along (111) orientation; forming at least a first tunneling barrier layer over the hard layer; forming a storage layer over the first tunneling barrier layer; and forming a top electrode over the storage layer. 2 . The method of claim 1 wherein the hard layer is formed over the seed layer. 3 . The method of claim 2 wherein a bilayer of the seed layer comprises a first layer Y having a thickness t 1 and a second layer X having a thickness t 2 and the n bilayers of the seed layer is defined by (Yt 1 /Xt 2 ) n , and wherein a total thickness of the seed layer is equal to (t 1 +t 2 )*n. 4 . The method of claim 3 wherein n is about 2-20 and the total thickness of the seed layer is about 5 nm or less. 5 . The method of claim 3 wherein: the first layer Y is disposed below the second layer X; and the first layer Y is a magnetic layer and the second layer X is a non-magnetic layer having a body-centered cubic (BCC) structure along (110) orientation with high recrystallization temperature. 6 . The method of claim 5 wherein: the first layer Y comprises Ni, CoNi or NiFe; and the second layer X comprises Mo, Cr, W, Nb or V. 7 . The method of claim 3 wherein the hard layer comprises a synthetic antiferromagnetic (SAF) layer which includes first and second antiparallel (AP) layers separated by a coupling layer. 8 . The method of claim 7 wherein an AP layer of the first and second AP layers comprises a bilayer and the AP layers are configured with a FCC structure along the (111) orientation facilitated by the base layer. 9 . The method of claim 8 wherein the bilayer of the AP layer comprises Co/Ni, CoFe/Ni or CoFeB/Ni. 10 . The method of claim 3 wherein the wetting layer comprises multiple layers which include Mg and layers having a BCC structure along (110) orientation or layers having a HCP structure along (0002) orientation which together promote the FCC structure along the (111) orientation. 11 . The method of claim 3 wherein the base layer further comprises a roughness smoother formed between the wetting layer and the seed layer, wherein the roughness smoother improves surface smoothness of the wetting layer. 12 . The method of claim 11 wherein the roughness smoother comprises first and second surfactant layers, wherein the first surfactant layer is a layer with small atoms for filling gaps to clean the interface while the second surfactant layer is deposited over the first surfactant layer. 13 . The method of claim 11 wherein the roughness smoother comprises a plasma treatment to improve surface smoothness of the wetting layer. 14 . The method of claim 2 comprising forming a second tunneling barrier layer over the storage layer, wherein the first and second tunneling barrier layers form a dual tunneling barrier storage unit. 15 . A method of forming a memory cell comprising: forming a select unit on a substrate, wherein the select unit comprises a transistor having a first source/drain (S/D) region, a second S/D region, and a gate between the first and second S/D regions; forming a dielectric layer on the substrate covering the select unit, wherein the dielectric layer includes a storage pad coupled to the first S/D region; forming a storage unit on the storage pad, wherein the storage unit comprises forming a bottom electrode, forming a fixed layer disposed over the bottom electrode, wherein the fixed layer comprises a hard layer disposed over a base layer, the base layer promotes face-centered cubic (FCC) structure along (111) orientation to increase perpendicular magnetic anisotropy, the base layer comprises a wetting layer, wherein the wetting layer comprises Mg, the wetting layer promotes FCC structure along (111) orientation, and a seed layer comprising n bilayers which promote FCC structure along (111) orientation; forming at least a first tunneling barrier layer over the hard layer, forming a storage layer over the first tunneling barrier layer, and forming a top electrode over the storage layer; and forming a bitline coupled to the top electrode layer. 16 . A storage unit of a memory cell comprising: a bottom electrode; a fixed layer disposed over the bottom electrode, wherein the fixed layer comprises a hard layer disposed over a base layer, the base layer promotes face-centered cubic (FCC) structure along (111) orientation to increase perpendicular magnetic anisotropy, the base layer comprises a wetting layer, wherein the wetting layer comprises Mg, the wetting layer promotes FCC structure along (111) orientation, and a seed layer comprising n bilayers which promote FCC structure along (111) orientation; at least a first tunneling barrier layer disposed over the hard layer; a storage layer disposed over the first tunneling barrier layer; and a top electrode disposed over the storage layer. 17 . The storage unit of claim 16 wherein a bilayer of the seed layer comprises a first layer Y having a thickness t 1 and a second layer X having a thickness t 2 and the n bilayers of the seed layer is defined by (Yt 1 /Xt 2 ) n , and wherein a total thickness of the seed layer is equal to (t 1 +t 2 )*n. 18 . The storage unit of claim 17 wherein: the first layer Y is disposed below the second layer X; and the first layer Y is a magnetic layer and the second layer X is a non-magnetic layer having a body-centered cubic (BCC) structure along (110) orientation with high recrystallization temperature. 19 . The storage unit of claim 17 wherein the wetting layer comprises multiple layers which include Mg and layers having a BCC structure along (110) orientation or layers having a HCP structure along (0002) orientation which together promote the FCC structure along the (111) orientation. 20 . The storage unit of claim 17 wherein the base layer further comprises a roughness smoother disposed between the wetting layer and the seed layer, wherein the roughness smoother improves surface smoothness of the wetting layer.

Assignees

Inventors

Classifications

  • H01L43/12Primary

    Electricity · mapped topic

  • Electricity · mapped topic

  • Materials of the active region · CPC title

  • Magnetoresistive devices · CPC title

  • H10N50/01Primary

    Manufacture or treatment · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2016254445A1 cover?
A magnetic memory having a base layer with a wetting layer and seed layer is disclosed. The wetting layer and seed layer promotes FCC structure along the (111) orientation to improve PMA. A surface smoother, such as a surfactant layer, is provided between the wetting and seed layers. This enhances the smoothness of the seed layer, resulting in smoother interface in the MTJ stack, which leads to…
Who is the assignee on this patent?
Globalfoundries Sg Pte Ltd
What technology area does this patent fall under?
Primary CPC classification H01L43/12. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Sep 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).