Automated high frequency test station

Patent metadata

Field	Value
Publication number	US-2016252561-A1
Application number	US-201415026693-A
Country	US
Kind code	A1
Filing date	Oct 2, 2014
Priority date	Oct 2, 2013
Publication date	Sep 1, 2016
Grant date	—

Abstract

A test station and method of testing a design under test are disclosed. One method includes applying a first test frequency signal to a reference path to determine a first known attenuation level, and applying the first test frequency signal to a design under test to determine a first tested attenuation level of the design under test at the first test frequency. The method also includes applying a second test frequency signal to the reference path to determine a second known attenuation level, and applying the second test frequency signal to the design under test to determine a second tested attenuation level of the design under test at the second test frequency. The method includes determining whether the design under test is faulty based on the first tested attenuation level and the second tested attenuation level.

First claim

1 . A test station comprising:
a test platform including a plurality of probes configured for electrical connection to a design under test; a radio frequency switch configured to receive at least first and second signals at first and second frequencies, the first and second frequencies being different from each other; an amplifier positioned and electrically connected to one or more of the plurality of probes, the amplifier configured to receive the selected signal from the radio frequency switch and output a test signal, the test signal corresponding to an amplified selected signal; a second amplifier positioned and electrically connected to one or more of the plurality of probes, the second amplifier configured to receive a result signal passed through the design under test; a power sensor electrically connected to receive a scaled result signal based on the result signal and generate a sensed power output signal; a control circuit communicatively connected to the radio frequency switch, amplifier, second amplifier, and power sensor, the control circuit configured to execute instructions to selectively apply the first and second frequencies as the test signal to the one or more of the plurality of probes, thereby applying a test signal at each of the first and second frequencies to the design under test, the control circuit further configured to determine the existence of a faulty design under test based on the sensed power output signal.

2 . The test station of claim 1 , further comprising a plurality of oscillators including at least a first oscillator operating at the first frequency and a second oscillator operating at the second frequency.

3 . The test station of claim 1 , further comprising a programmable attenuator receiving the amplified result signal and outputting an attenuated amplified result signal provided to the power sensor.

4 . The test station of claim 1 , further comprising a plurality of isolation switches, each isolation switch electrically connected between one of the plurality of oscillators and the radio frequency switch, each isolation switch providing selective

5 . The test station of claim 1 , wherein the tester further includes a display communicatively connected to the control circuit.

6 . The test station of claim 1 , wherein the control circuit comprises a microprocessor.

7 . The test station of claim 1 , further comprising first and second switches configured to selectively deliver the test signal to at least some of the plurality of probes, thereby providing the test signal to the design under test.

8 . The test station of claim 1 , further comprising a reference attenuator positioned between the first and second switches.

9 . The test station of claim 1 , wherein the design under test comprises a subassembly of an RJ-45 jack.

10 . The test station of claim 1 , wherein the first frequency is 250 MHz, and the second frequency is 500 MHz.

11 . The test station of claim 1 , wherein the control circuit detects the existence of a faulty design under test by computing near end crosstalk generated by the design under test at each of the first and second frequencies.

12 . The test station of claim 1 , further comprising:
an in-feed conveyor delivering a plurality of electrical connector subassemblies to the test station; and a gripper head configured to sequentially deliver electrical connector subassemblies onto the plurality of probes for testing, each electrical connector subassembly representing the design under test when positioned on the plurality of probes.

13 . The test station of claim 1 , further comprising a reject chute positioned to receive faulty electrical connector subassemblies as determined by the control circuit.

14 . The test station of claim 1 , further including one or more baluns electrically delivering the test signal to and receiving the result signal from to the plurality of probes electrically connected to the design under test.

15 . The test station of claim 1 , further comprising a temperature sensor connected to the control circuit and useable to compensate the result signal based on a current temperature.

16 . The test station of claim 1 , further comprising a plurality of communication ports electrically connected to the control circuit.

17 . A method of testing performance of one or more designs under test, the method comprising:
applying a first test frequency signal to a reference path to determine a first known attenuation level; applying the first test frequency signal to a design under test to determine a first tested attenuation level of the design under test at the first test frequency; applying a second test frequency signal to the reference path to determine a second known attenuation level; applying the second test frequency signal to the design under test to determine a second tested attenuation level of the design under test at the second test frequency; and determining whether the design under test is faulty based on the first tested attenuation level and the second tested attenuation level.

18 . The method of claim 17 , further comprising, based on determining whether the design under test is faulty, rejecting the design under test as being noncompliant.

19 . The method of claim 18 , further comprising positioning the rejected design under test in a reject chute.

20 . The method of claim 17 , further comprising positioning the design under test on a test station including a plurality of probes using a gripper head.

21 . The method of claim 17 , wherein determining whether the design under test is faulty comprises determining a near end crosstalk at each of the first and second frequencies.

22 . A method of testing performance of an RJ-45 connector, the method comprising:
testing an RJ-45 jack to determine a near-end crosstalk of the RJ-45 jack; modifying a compensation circuit of the RJ-45 jack to tune a near-end crosstalk such that it at least approaches a maximum near-end crosstalk; disassembling the RJ-45 jack to arrive at a jack subassembly including the modified compensation circuit; testing the jack subassembly to determine a near-end crosstalk of the jack subassembly including the modified compensation circuit to determine a maximum near-end crosstalk acceptable for a jack subassembly under test; modifying a second compensation circuit of a second RJ-45 jack to tune a near-end crosstalk such that it at least approaches a minimum near-end crosstalk; disassembling the second RJ-45 jack to arrive at a second jack subassembly including the second modified compensation circuit; and testing the second jack subassembly to determine a near-end crosstalk of the second jack subassembly including the second modified compensation circuit to determine a minimum near-end crosstalk acceptable for the jack subassembly under test.

23 . The method of claim 22 , further comprising:
testing a subsequent jack subassembly to determine a near-end crosstalk of the subsequent jack subassembly; comparing the near-end crosstalk of the subsequent jack subassembly to the maximum near-end crosstalk and the minimum near-end crosstalk.

Assignees

• Tyco Electronics Ltd Uk

Inventors

• George Ian Robert
• Hammond Jr Bernard Harold
• Meachen Jacob
• White Gordon John

Classifications

• G01R31/69 Primary

  of terminals at the end of a cable or a wire harness; of plugs; of sockets, e.g. wall sockets or power sockets in appliances · CPC title

• G01R1/0408 Primary

  Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets (G01R1/067 takes precedence; mass production testing systems G01R31/59; testing of connections G01R31/66; for testing printed circuit boards G01R31/2808) · CPC title

• G01R31/2805

  Bare printed circuit boards · CPC title

• G01R31/2834

  Automated test systems [ATE]; using microprocessors or computers (G01R31/317 takes precedence; ATE for detection of defective computer hardware G06F11/2736) · CPC title

• G01R31/2808

  Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards (probe, multiprobe, probe manipulator or probe fixture G01R1/067) · CPC title