Offsetting unwanted downlink interference signals in an uplink path in a distributed antenna system (das)

Patent metadata

Field	Value
Publication number	US-2016249346-A1
Application number	US-201615042532-A
Country	US
Kind code	A1
Filing date	Feb 12, 2016
Priority date	Feb 19, 2015
Publication date	Aug 25, 2016
Grant date	—

Abstract

Offsetting unwanted downlink interference signals in an uplink path in a distributed antenna system (DAS) is disclosed. In this regard, in one example, an interference signal offset circuit is provided in an RAU to offset interference products leaked from a downlink path to an uplink path. An offset signal generation circuit is configured to generate at least one uplink interference offset signal based on the interference products leaked from the downlink path. A signal summing circuit is configured to combine the at least one uplink interference offset signal with an uplink signal received on the uplink path, thus offsetting the interference products in the uplink signal. By providing the interference signal offset circuit in the RAU to offset the interference products on the uplink path, it is possible to provide more implementation flexibility for the RAU without degrading the uplink signal.

First claim

What is claimed is:

1 . An interference signal offset circuit in a distributed antenna system (DAS), comprising:
at least one offset signal generation circuit configured to:
receive a downlink signal in a downlink path, the downlink signal comprising at least one unwanted downlink interference signal; and
generate at least one uplink interference offset signal based on the received at least one unwanted downlink interference signal;
a signal summing circuit configured to:
receive an uplink signal in an uplink path, the uplink signal comprising a wanted uplink signal and the at least one unwanted downlink interference signal leaked from the downlink path to the uplink path;
receive the at least one uplink interference offset signal;
generate an output uplink signal based on the received uplink signal; and
combine the received at least one uplink interference offset signal with the received uplink signal to offset the at least one unwanted downlink interference signal from the output uplink signal; and
a control circuit configured to:
receive the output uplink signal from the signal summing circuit; and
configure the at least one offset signal generation circuit to generate the at least one uplink interference offset signal to offset the at least one unwanted downlink interference signal.

2 . The interference signal offset circuit of claim 1 , wherein the control circuit is further configured to:
measure a power level of the at least one unwanted downlink interference signal; and
configure the at least one offset signal generation circuit to generate the at least one uplink interference offset signal based on the measured power level.

3 . The interference signal offset circuit of claim 1 , wherein:
the at least one unwanted downlink interference signal comprises one or more downlink interference products; and the at least one offset signal generation circuit is configured to generate the at least one uplink interference offset signal based on at least one downlink interference product among the one or more downlink interference products in the received at least one unwanted downlink interference signal.

4 . The interference signal offset circuit of claim 3 , wherein the control circuit is further configured to:
measure a power level of the at least one downlink interference product among the one or more downlink interference products; and configure the at least one offset signal generation circuit to generate the at least one uplink interference offset signal based on the measured power level.

5 . The interference signal offset circuit of claim 4 , wherein the at least one offset signal generation circuit is configured generate the at least one uplink interference offset signal to substantially match the power level of the at least one downlink interference product and be substantially opposite in phase of a phase of the at least one downlink interference product.

6 . The interference signal offset circuit of claim 3 , wherein the at least one uplink interference offset signal generated by the at least one offset signal generation circuit is configured to offset the at least one downlink interference product among the one or more downlink interference products in the received at least one unwanted downlink interference signal.

7 . The interference signal offset circuit of claim 1 , wherein:
the at least one unwanted downlink interference signal comprises a plurality of downlink intermodulation products; and the at least one offset signal generation circuit is configured to generate the at least one uplink interference offset signal based on at least one downlink intermodulation product among the plurality of downlink intermodulation products in the received at least one unwanted downlink interference signal.

8 . The interference signal offset circuit of claim 1 , wherein:
the at least one unwanted downlink interference signal comprises a plurality of downlink harmonic products; and the at least one offset signal generation circuit is configured to generate the at least one uplink interference offset signal based on at least one downlink harmonic product among the plurality of downlink harmonic products in the received at least one unwanted downlink interference signal.

9 . A method of offsetting at least one unwanted downlink interference signal from an uplink signal received in a distributed antenna system (DAS), comprising:
receiving a downlink signal in a downlink path, wherein the downlink signal comprises at least one unwanted downlink interference signal; generating at least one uplink interference offset signal based on the received at least one unwanted downlink interference signal; receiving an uplink signal in an uplink path, wherein the uplink signal comprises a wanted uplink signal and the at least one unwanted downlink interference signal leaked from the downlink path to the uplink path; generating an output uplink signal based on the uplink signal; and combining the at least one uplink interference offset signal with the uplink signal to offset the at least one unwanted downlink interference signal in a clean output uplink signal.

10 . The method of claim 9 , further comprising generating the at least one uplink interference offset signal to offset at least one downlink interference product among one or more downlink interference products in the received at least one unwanted downlink interference signal.

11 . The method of claim 9 , further comprising:
generating the at least one uplink interference offset signal by at least one offset signal generation circuit; and combining the uplink signal with the at least one uplink interference offset signal by a signal summing circuit.

12 . The method of claim 11 , further comprising receiving the uplink signal from a coupling device communicatively coupled to at least one antenna, wherein the coupling device is further configured to provide the downlink signal to the at least one antenna.

13 . The method of claim 12 , further comprising:
decoupling the at least one antenna from the coupling device; decoupling the at least one offset signal generation circuit from the signal summing circuit; receiving a downlink test signal in the downlink path, wherein the downlink test signal comprises one or more downlink test interference products; receiving an uplink test signal in the uplink path, wherein the uplink test signal comprises the one or more downlink test interference products leaked from the downlink path to the uplink path; and measuring a power level of at least one downlink test interference product among the one or more downlink test interference products.

14 . The method of claim 13 , further comprising:
decoupling the signal summing circuit from the coupling device; coupling the at least one offset signal generation circuit to the signal summing circuit; providing the downlink signal to the at least one offset signal generation circuit, wherein the downlink signal comprises one or more downlink interference products; receiving at least one downlink interference product among the one or more downlink interference products from the at least one offset signal generation circuit; and measuring a power level of the at least one downlink interference product received from the at least one offset signal generation circuit.

15 . The method of claim 14 , further comprising adjusting the power level of the at least one downlink interference product to substantially match the power level of the at least one downlink test interference product.

16 . The

Assignees

• Corning Optical Communications Wireless Ltd

Inventors

• Harel Dror

Classifications

• H04W52/243 Primary

  taking into account interferences · CPC title

• H04B7/022

  Site diversity; Macro-diversity (using two or more spaced independent antennas H04B7/04) · CPC title

• H04B17/11

  for calibration · CPC title

• H04B17/14

  of the whole transmission and reception path, e.g. self-test loop-back · CPC title

• H04B17/0085

  using test signal generators · CPC title