Image sensor and image processing system including same

Patent metadata

Field	Value
Publication number	US-2016248990-A1
Application number	US-201615017714-A
Country	US
Kind code	A1
Filing date	Feb 8, 2016
Priority date	Feb 23, 2015
Publication date	Aug 25, 2016
Grant date	—

Abstract

An image sensor includes a pixel array including preview pixels and capture pixels, a first readout circuit configured to communicate a preview image data generated by the preview pixels to a digital signal processor via a first interface, a second readout circuit configured to communicate a captured image data generated by the capture pixels to the digital signal processor via a second interface different from the first interface, and a controller configured to control the first readout circuit and the second readout circuit to communicate the preview image data and the captured image data in parallel to the digital signal processor.

First claim

What is claimed is:

1 . An image sensor comprising:
a pixel array including preview pixels and capture pixels; a first readout circuit that communicates preview image data generated by the preview pixels to a Digital Signal Processor (DSP) via a first interface; a second readout circuit that communicates captured image data generated by the capture pixels to the DSP via a second interface different from the first interface; and a controller that controls operation of the first readout circuit and second readout circuit, such that the preview image data and captured image data are provided to the DSP in parallel.

2 . The image sensor of claim 1 , wherein the preview image data is provided at a first frame rate and the captured image data is provided at a second frame rate different from the first frame rate.

3 . The image sensor of claim 1 , wherein the preview image data is provided at a first frame rate and the captured image data is provided at a second frame rate lower than the first frame rate.

4 . The image sensor of claim 1 , wherein the controller controls the second readout circuit to communicate the captured image data to the DSP via the second readout circuit in response to a capture command received while the preview image data is being communicated to the DSP via the first readout circuit.

5 . The image sensor of claim 4 , wherein the image sensor maintains the first readout circuit active so that the preview image data is communicated to the DSP via the first readout circuit while the captured image data is communicated to the DSP via the second readout circuit.

6 . The image sensor of claim 1 , wherein the controller exposes the preview pixels during a first exposure time and exposes the capture pixels for a second exposure time different from the first exposure time.

7 . An image processing system comprising:
an image sensor that provides in parallel preview image data and captured image data; and a Digital Signal Processor (DSP) that receives in parallel the preview image data and captured image data and merges the preview image data and captured image data to generate merged image data.

8 . The image processing system of claim 7 , wherein the image sensor comprises:
a pixel array including preview pixels and capture pixels; a first readout circuit that communicates the preview image data generated by the preview pixels to the DSP via a first interface; a second readout circuit that communicates the captured image data generated by the capture pixels to the DSP via a second interface different from the first interface; and a controller that controls operation of the first readout circuit and second readout circuit, such that the preview image data and captured image data are provided to the DSP in parallel.

9 . The image processing system of claim 8 , wherein the preview image data is provided at a first frame rate and the captured image data is provided at a second frame rate different from the first frame rate.

10 . The image processing system of clam 8 , wherein the preview image data is provided at a first frame rate and the captured image data is provided at a second frame rate lower than the first frame rate.

11 . The image processing system of claim 8 , wherein the controller controls the second readout circuit to communicate the captured image data to the DSP in response to a capture command received while the preview image data is being communicated to the DSP via the first readout circuit.

12 . The image processing system of claim 11 , wherein the image sensor maintains the first readout circuit active so that the preview image data is communicated to the DSP via the first readout circuit when the captured image is communicated to the DSP via the second readout circuit.

13 . The image processing system of claim 8 , wherein the controller exposes the preview pixels during a first exposure time and exposes the capture pixels for a second exposure time different from the first exposure time.

14 . An electronic device, comprising:
a Digital Signal Processor (DSP) that generates merged image data; a display that displays an image in response to the merged image data received from the DSP; and an image sensor including a pixel array comprising preview pixels that generate preview image data and capture pixels that generate captured image data, wherein the image sensor provides the preview image data and captured image data to the DSP in parallel, and the DSP merges the preview image data and captured image data to generate the merged image data.

15 . The electronic device of claim 14 , wherein the display is one of a thin film transistor-liquid crystal display (TFT-LCD), a light emitting diode (LED) display, an organic LED (OLED) display, and an active-matrix OLED (AMOLED) display.

16 . The electronic device of claim 15 , wherein the image sensor comprises:
a first readout circuit that communicates the preview image data to the DSP via a first interface; a second readout circuit that communicates the captured image data to the DSP via a second interface different from the first interface; and a controller that controls operation of the first readout circuit and second readout circuit, such that the preview image data and captured image data are provided to the DSP in parallel.

17 . The electronic device of claim 16 , wherein the preview image data is provided at a first frame rate and the captured image data is provided at a second frame rate different from the first frame rate.

18 . The electronic device of claim 16 , wherein the controller controls the second readout circuit to communicate the captured image data to the DSP in response to a capture command received in response to a user input while the preview image data is being communicated to the DSP via the first readout circuit.

19 . The electronic device of claim 18 , wherein the image sensor maintains the first readout circuit active so that the preview image data is communicated to the DSP via the first readout circuit when the captured image is communicated to the DSP via the second readout circuit.

20 . The electronic device of claim 19 , wherein the display does not undergo a blackout in response to the user input.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Byung Jo
• Ham Seog Heon
• Kim Se Jun
• Shin Ji Hun

Classifications

• H04N25/767

  Horizontal readout lines, multiplexers or registers · CPC title

• H04N25/443

  by reading pixels from selected two-dimensional [2D] regions of the array, e.g. for windowing or digital zooming · CPC title

• H04N25/445

  by skipping some contiguous pixels within the read portion of the array · CPC title

• H04N23/73 Primary

  by influencing the exposure time · CPC title

• H04N25/583

  with different integration times · CPC title