Packet steering

Patent metadata

Field	Value
Publication number	US-2016248671-A1
Application number	US-201615145848-A
Country	US
Kind code	A1
Filing date	May 4, 2016
Priority date	Nov 8, 2011
Publication date	Aug 25, 2016
Grant date	—

Abstract

A method for steering packets includes receiving a packet and determining parameters to be used in steering the packet to a specific destination, in one or more initial steering stages, based on one or more packet specific attributes. The method further includes determining an identity of the specific destination of the packet in one or more subsequent steering stages, governed by the parameters determined in the one or more initial stages and one or more packet specific attributes, and forwarding the packet to the determined specific destination.

First claim

1 . A packet steering unit, comprising:
an input interface configured to receive packets for steering; one or more memory units configured with a plurality of instructions on a plurality of respective sets of fields of packets to be used in determining steering destinations of packets; and a hardware-logic steering engine configured to receive a packet through the input interface, to access an instruction indicating a respective set of packet fields corresponding to the packet, from the plurality of instructions in the one or more memory units, to determine a steering destination for the packet responsive to values in the set of fields of the packet indicated by the accessed instruction in the one or more memory units, and accordingly to steer the packet, such that different received packets are steered to destinations selected based on different sets of fields.

2 . The packet steering unit of claim 1 , wherein the input interface comprises a plurality of ports, and wherein at least one of the ports can receive packets of InfiniBand or Ethernet according to a port configuration, and wherein the one or more memory units store one or more instructions for InfiniBand packets and one or more instructions for Ethernet packets.

3 . The packet steering unit of claim 1 , wherein the input interface comprises a plurality of ports configured to receive packets in accordance with different protocols and wherein the steering engine is configured to steer packets of the different protocols concurrently.

4 . The packet steering unit of claim 1 , wherein the one or more memory units are configured with a plurality of steering tables including the instructions on fields of packets to be used in determining steering destinations of packets.

5 . The packet steering unit of claim 4 , wherein the hardware-logic steering engine is configured to access a plurality of table entries in determining for one or more packets a single destination.

6 . The packet steering unit of claim 5 , wherein the hardware-logic steering engine is configured to use different packet fields in accessing each of the plurality of table entries.

7 . The packet steering unit of claim 5 , wherein each table entry includes an instruction on whether an additional lookup stage should be performed for the current packet and the packet fields to be used in the additional lookup stage, if an additional lookup is to be performed.

8 . The packet steering unit of claim 5 , wherein the hardware-logic steering engine is configured to access different numbers of table entries for different packets.

9 . The packet steering unit of claim 5 , wherein the hardware-logic steering engine is configured to access entries of a plurality of tables in determining for one or more packets a single destination.

10 . The packet steering unit of claim 5 , wherein the hardware-logic steering engine is configured to access a plurality of tables having different entry sizes, in determining for one or more packets a single destination.

11 . The packet steering unit of claim 1 , wherein the steering unit is configured to handle a plurality of packets concurrently.

12 . The packet steering unit of claim 11 , wherein the steering unit is configured to be able to examine different fields of packets handled concurrently.

13 . The packet steering unit of claim 1 , wherein the hardware-logic steering engine is configured to perform a plurality of lookup stages on the packet, and is configured to determine for each packet handling stage it performs, an entry of the list which determines the fields of the packets to be used in the stage.

14 . The packet steering unit of claim 1 , wherein the hardware-logic steering engine is configured to select the field arrangements in the list responsively to a port through which the packet was received.

15 . The packet steering unit of claim 1 , wherein the instructions on fields of packets to be used in determining steering destinations of packets are reconfigurable.

Assignees

• Mellanox Technologies Ltd

Inventors

• Arad Nir Haim
• Bloch Noam
• Shahar Ariel
• Chapman Hillel
• Wated Amir

Classifications

• H04L45/745

  Address table lookup; Address filtering · CPC title

• H04L47/10

  Flow control; Congestion control · CPC title

• H04L45/74 Primary

  Address processing for routing · CPC title

• H04L49/70 Primary

  Virtual switches · CPC title

• H04L49/358

  Infiniband Switches · CPC title