Substrate packaging method

Patent metadata

Field	Value
Publication number	US-2016248016-A1
Application number	US-201414378425-A
Country	US
Kind code	A1
Filing date	Jul 2, 2014
Priority date	Jun 17, 2014
Publication date	Aug 25, 2016
Grant date	—

Abstract

The present invention provides a substrate packaging method, comprising steps of: step 1: providing a base substrate and a packaging substrate; step 2: disposing a circle of inorganic insulation film on the packaging substrate; step 3: disposing a circle of ultraviolet (UV) sealant outside the circle of inorganic insulation film on the packaging substrate; step 4: oppositely adhering the packaging substrate to the base substrate; and step 5, utilizing an ultraviolet (UV) light source to irradiate the UV sealant so as to cure the UV sealant in order to package the packaging substrate and the base substrate. The packaging method can improve the packaging effect, increase the ability for resisting the water vapor and the oxygen, and extend the life of the OLED device.

First claim

What is claimed is:

1 . A substrate packaging method, comprising steps of:
step 1: providing a base substrate and a packaging substrate; step 2: disposing a circle of inorganic insulation film on the packaging substrate; step 3: disposing a circle of ultraviolet (UV) sealant outside the circle of inorganic insulation film on the packaging substrate; step 4: oppositely adhering the packaging substrate to the base substrate; and step 5, utilizing an ultraviolet (UV) light source to irradiate the UV sealant so as to cure the UV sealant in order to package the packaging substrate and the base substrate.

2 . The substrate packaging method according to claim 1 , wherein, the base substrate is a thin-film-transistor (TFT) substrate and the packaging substrate is a glass plate.

3 . The substrate packaging method according to claim 2 , wherein, the base substrate is provided with an OLED device.

4 . The substrate packaging method according to claim 1 , wherein, the packaging substrate in the step 1 is disposed with a coating position for disposing the UV sealant, the inorganic insulation film disposed in the step 2 is located inside the coating position, the UV sealant disposed in the step 3 is located on the coating position, and the UV sealant is disposed on the packaging substrate by a coating method.

5 . The substrate packaging method according to claim 4 , wherein, the inorganic insulation film is made of silicon dioxide (SiO2) or silicon nitride (SiNx).

6 . The substrate packaging method according to claim 1 , wherein, the step 2 further comprises steps of disposing a circle of metal layer on the packaging substrate in advance and disposing the inorganic insulation film on the metal layer.

7 . The substrate packaging method according to claim 6 , wherein, the metal layer is made of molybdenum.

8 . The substrate packaging method according to claim 1 , wherein, when fabricating an alignment mark of the packaging substrate, the inorganic insulation film is formed simultaneously; the inorganic insulation film is fabricated by coating using a chemical vapor deposition (CVD) and etching after coated.

9 . The substrate packaging method according to claim 1 , wherein, a width of the inorganic insulation film ranges from 20 um to 2000 um; a height of the inorganic insulation film ranges from 3 um to 50 um; the inorganic insulation film on the same packaging substrate is the same in width and height; after adhering the packaging substrate to the base substrate in the step 4, a width of the UV sealant is controlled within 1 mm to 5 mm; a height of the UV sealant is greater than the height of the inorganic insulation film in the step 3.

10 . The substrate packaging method according to claim 4 , wherein, an outer edge of the inorganic insulation film is located at a distance of 0.5 mm to 5 mm from a center line of the coating position.

11 . A substrate packaging method, comprising steps of:
step 1: providing a base substrate and a packaging substrate; step 2: disposing a circle of inorganic insulation film on the packaging substrate; step 3: disposing a circle of ultraviolet (UV) sealant outside the circle of inorganic insulation film on the packaging substrate; step 4: oppositely adhering the packaging substrate to the base substrate; and step 5, utilizing an ultraviolet (UV) light source to irradiate the UV sealant so as to cure the UV sealant in order to package the packaging substrate and the base substrate; wherein, the base substrate is a thin-film-transistor (TFT) substrate, and the packaging substrate is a glass plate; wherein, the base substrate is provided with an OLED device; wherein, the packaging substrate in the step 1 is disposed with a coating position for disposing the UV sealant, the inorganic insulation film disposed in the step 2 is located inside the coating position, the UV sealant disposed in the step 3 is located on the coating position, and the UV sealant is disposed on the packaging substrate by a coating method; wherein, the inorganic insulation film is made of silicon dioxide (SiO2) or silicon nitride (SiNx); wherein, when fabricating an alignment mark of the packaging substrate, the inorganic insulation film is formed simultaneously; the inorganic insulation film is fabricated by coating using a chemical vapor deposition (CVD) and etching after coated. wherein, a width of the inorganic insulation film ranges from 20 um to 2000 um; a height of the inorganic insulation film ranges from 3 um to 50 um; the inorganic insulation film on the same packaging substrate is the same in width and height; after adhering the packaging substrate to the base substrate in the step 4, a width of the UV sealant is controlled within 1 mm to 5 mm; a height of the UV sealant is greater than the height of the inorganic insulation film in the step 3; and wherein, an outer edge of the inorganic insulation film is located at a distance of 0.5 mm to 5 mm from a center line of the coating position.

Assignees

• Shenzhen China Star Optoelect

Inventors

• Liu Yawei

Classifications

• H10K71/40

  Thermal treatment, e.g. annealing in the presence of a solvent vapour · CPC title

• H10K71/50

  Forming devices by joining two substrates together, e.g. lamination techniques · CPC title

• H10K59/8722 Primary

  Peripheral sealing arrangements, e.g. adhesives, sealants · CPC title

• H01L51/0024 Primary

  Electricity · mapped topic

• H01L51/5246

  Electricity · mapped topic