Semiconductor device and method for manufacturing the same

US2016247907A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016247907-A1
Application numberUS-201615048112-A
CountryUS
Kind codeA1
Filing dateFeb 19, 2016
Priority dateFeb 24, 2015
Publication dateAug 25, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device of an embodiment includes a SiC layer having a surface, the surface inclined at an angle of 0° to 10° with respect to a {000-1} face or the surface having a normal line direction inclined at an angle of 80° to 90° with respect to a <000-1> direction, a gate electrode, a gate insulating layer provided between the surface and the gate electrode, and a region provided between the surface and the gate insulating layer, a maximum concentration of deuterium (D) in the region being 1×10 20 cm −3 or more and a maximum concentration of hydrogen (H) in the region being 1×10 19 cm −3 or less.

First claim

Opening claim text (preview).

What is claimed is: 1 . A semiconductor device comprising: a SiC layer having a surface, the surface inclined at an angle of 0° to 10° with respect to a {000-1} face or the surface having a normal line direction inclined at an angle of 80° to 90° with respect to a <000-1> direction; a gate electrode; a gate insulating layer provided between the surface and the gate electrode; and a region provided between the surface and the gate insulating layer, a maximum concentration of deuterium (D) in the region being 1×10 20 cm −3 or more and a maximum concentration of hydrogen (H) in the region being 1×10 19 cm −3 or less. 2 . The device according to claim 1 , wherein concentration distribution of deuterium in the region has a peak, and a full width at half maximum of the peak is 10 nm or less. 3 . The device according to claim 1 , wherein the maximum concentration of deuterium in the region is 1×10 21 cm −3 or more. 4 . The device according to claim 1 , wherein the gate insulating layer is a silicon oxide film. 5 . A method for manufacturing a semiconductor device comprising: forming a gate insulating layer on a surface of a SiC layer, the surface inclined at an angle of 0° to 10° with respect to a {000-1} face, or, the surface having a normal line direction inclined at an angle of 80° to 90° with respect to a <000-1> direction; performing first heat treatment in an atmosphere containing deuterium after forming the gate insulating layer; and forming a gate electrode on the gate insulating layer after performing the first heat treatment. 6 . The method according to claim 5 , wherein the gate insulating layer is a silicon oxide film. 7 . The method according to claim 5 , further comprising performing second heat treatment of 800° C. or more after the first heat treatment. 8 . The method according to claim 5 , wherein the gate insulating layer is a deposition film. 9 . The method according to claim 5 , wherein the gate insulating layer is a thermal oxide film. 10 . The method according to claim 5 , wherein the first heat treatment is performed at 900° C. 11 . A method for manufacturing a semiconductor device comprising: forming a gate insulating layer on a surface of a SiC layer, the forming the gate insulating layer including thermally-oxidizing the surface in an atmosphere containing deuterium and oxygen, the surface inclined at an angle of 0° to 10° with respect to a {000-1} face, or the surface having a normal line direction inclined at an angle of 80° to 90° with respect to a <000-1> direction; and forming a gate electrode on the gate insulating layer. 12 . The method according to claim 11 , wherein the gate insulating layer is formed by depositing an insulating film after the thermally-oxidizing the surface. 13 . The method according to claim 12 , wherein the insulating film is a silicon oxide film. 14 . The method according to claim 11 , further comprising performing a heat treatment of 800° C. or more after the forming the gate insulating layer. 15 . The method according to claim 11 , wherein the thermally-oxidizing the surface is performed at 800° C. or more.

Assignees

Inventors

Classifications

  • Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma · CPC title

  • the semiconductor being silicon carbide · CPC title

  • of vertical IGBTs · CPC title

  • using recessing of the gate electrodes, e.g. to form trench gate electrodes · CPC title

  • of vertical DMOS [VDMOS] FETs · CPC title

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What does patent US2016247907A1 cover?
A semiconductor device of an embodiment includes a SiC layer having a surface, the surface inclined at an angle of 0° to 10° with respect to a {000-1} face or the surface having a normal line direction inclined at an angle of 80° to 90° with respect to a <000-1> direction, a gate electrode, a gate insulating layer provided between the surface and the gate electrode, and a region provided betwee…
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H10D30/66. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 25 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).