Integrated circuit device and electronic device

US2016247458A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016247458-A1
Application numberUS-201615048115-A
CountryUS
Kind codeA1
Filing dateFeb 19, 2016
Priority dateFeb 24, 2015
Publication dateAug 25, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

An integrated circuit device that drives an electro-optical panel using a driving waveform which is set in a plurality of phases includes: a driving voltage generation unit that operates while receiving a supply of a power supply voltage generated by a power supply circuit, and generates a plurality of driving voltages to be applied to a plurality of electrodes in the electro-optical panel in each of a plurality of phases, in accordance with display data; and a power supply control unit that sets current supply capability of the power supply circuit to a first level synchronously with a timing of start of a phase, and sets the current supply capability to a second level, which is lower than the first level.

First claim

Opening claim text (preview).

What is claimed is: 1 . An integrated circuit device that drives an electro-optical panel using a driving waveform which is set in a plurality of phases, comprising: a driving voltage generation unit that operates as a result of receiving a supply of a power supply voltage generated by a power supply circuit, and generates a plurality of driving voltages to be applied to a plurality of electrodes in the electro-optical panel in each of a plurality of phases, in accordance with display data; and a power supply control unit that sets current supply capability of the power supply circuit to a first level synchronously with a timing of start of a phase, and sets the current supply capability of the power supply circuit to a second level, which is lower than the first level, after at least a predetermined time period has elapsed since the current supply capability of the power supply circuit was set to the first level. 2 . The integrated circuit device according to claim 1 , wherein the power supply control unit sets the current supply capability of the power supply circuit to the first level by operating the power supply circuit in a standard power mode, and sets the current supply capability of the power supply circuit to the second level by operating the power supply circuit in a low power consumption mode or stopping an operation of the power supply circuit. 3 . The integrated circuit device according to claim 1 , wherein the power supply control unit sets the current supply capability of the power supply circuit to the first level by operating the power supply circuit in a standard power mode, and sets the current supply capability of the power supply circuit to the second level by alternately operating the power supply circuit in the standard power mode and in a low power consumption mode or intermittently operating the power supply circuit. 4 . The integrated circuit device according to claim 1 , wherein the power supply control unit sets the current supply capability of the power supply circuit to the first level prior to a timing of start of a phase. 5 . The integrated circuit device according to claim 1 , wherein the power supply control unit determines the length of a time period in which the current supply capability of the power supply circuit is maintained at the first level or the second level, in accordance with a temperature measured by a temperature sensor. 6 . The integrated circuit device according to claim 1 , wherein the power supply control unit determines the length of a time period in which the current supply capability of the power supply circuit is maintained at the first level or the second level, in accordance with the number of output terminals to which a driving voltage is applied that changes at a timing of start of a phase, or the total area of pixel electrodes connected to the output terminals in the electro-optical panel. 7 . The integrated circuit device according to claim 1 , wherein the power supply control unit determines the length of a time period in which the current supply capability of the power supply circuit is maintained at the first level or the second level, in accordance with the total length of a boundary line between adjoining pixel electrodes to which different driving voltages are applied in the electro-optical panel after a phase starts. 8 . The integrated circuit device according to claim 1 , further comprising: a voltage monitoring unit that measures the power supply voltage generated by the power supply circuit, wherein the power supply control unit changes the current supply capability of the power supply circuit from the second level to the first level in a case where the power supply voltage becomes smaller than a predetermined voltage while the current supply capability of the power supply circuit is maintained at the second level. 9 . The integrated circuit device according to claim 1 , wherein the power supply control unit sets the current supply capability of the power supply circuit to a third level, which is lower than or equal to the first level and higher than the second level, in a precharging period that is prior to a driving period in which the driving voltage is generated in a plurality of phases. 10 . The integrated circuit device according to claim 1 , wherein, in a case where a second predetermined time period has elapsed since the current supply capability of the power supply circuit was set to the second level, the power supply control unit sets the current supply capability of the power supply circuit to a third level, which is lower than or equal to the first level and higher than the second level, in a first precharging period that is prior to a driving period in which the driving voltage is generated in a plurality of phases, and in a case where the second predetermined time period has not elapsed since the current supply capability of the power supply circuit was set to the second level, the power supply control unit sets the current supply capability of the power supply circuit to the third level in a second precharging period, which is shorter than the first precharging period, or sets the current supply capability of the power supply circuit to the first level at or after a timing of start of the driving period. 11 . The integrated circuit device according to claim 1 , further comprising: a voltage monitoring unit that measures the power supply voltage generated by the power supply circuit, wherein in a case where the power supply voltage becomes smaller than a predetermined voltage while the current supply capability of the power supply circuit is maintained at the second level, the power supply control unit sets the current supply capability of the power supply circuit to a third level, which is lower than or equal to the first level and higher than the second level in a first precharging period that is prior to a driving period in which the driving voltage is generated in a plurality of phases, and in a case where the power supply voltage does not become smaller than the predetermined voltage, the power supply control unit sets the current supply capability of the power supply circuit to the third level in a second precharging period, which is shorter than the first precharging period, or sets the current supply capability of the power supply circuit to the first period at or after a timing of start of the driving period. 12 . The integrated circuit device according to claim 1 , further comprising: a power supply circuit that boosts a power supply voltage supplied from the outside to generate a boosted power supply voltage by performing a charge-pump operation in accordance with a clock signal, wherein the power supply control unit changes the current supply capability of the power supply circuit by changing the frequency of the clock signal supplied to the power supply circuit, or controlling whether to supply the clock signal to the power supply circuit. 13 . An electronic device comprising: an electro-optical panel; and the integrated circuit device according to claim 1 . 14 . The electronic device according to claim 13 , wherein the electro-optical panel is provided with a pixel circuit including: a pixel electrode opposed to a common electrode; a switching circuit connected to a data line; a holding circuit that holds image data supplied from the data line via the switching circuit; and a selector circuit that electrically connects selected one of a first control line and a second control line to the pixel electrode in accordance with the image data held by the holding circuit, and the power supply co

Assignees

Inventors

Classifications

  • for presentation of a single character by selection from a plurality of characters, or by composing the character by combination of individual elements, e.g. segments {using a combination of such display devices for composing words, rows or the like, in a frame with fixed character positions} · CPC title

  • G09G3/344Primary

    based on particles moving in a fluid or in a gas, e.g. electrophoretic devices (electrophoretic devices per se G02F1/167) · CPC title

  • Static memory circuit, e.g. flip-flop · CPC title

  • Power management, e.g. power saving · CPC title

  • Details of timing specific for flat panels, other than clock recovery · CPC title

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What does patent US2016247458A1 cover?
An integrated circuit device that drives an electro-optical panel using a driving waveform which is set in a plurality of phases includes: a driving voltage generation unit that operates while receiving a supply of a power supply voltage generated by a power supply circuit, and generates a plurality of driving voltages to be applied to a plurality of electrodes in the electro-optical panel in e…
Who is the assignee on this patent?
Seiko Epson Corp
What technology area does this patent fall under?
Primary CPC classification G09G3/344. Mapped technology areas include Physics.
When was this patent published?
Publication date Thu Aug 25 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).