Detection circuit, liquid crystal display panel and method for manufacturing the liquid crystal display panel

Patent metadata

Field	Value
Publication number	US-2016246145-A1
Application number	US-201514417695-A
Country	US
Kind code	A1
Filing date	Jan 20, 2015
Priority date	Oct 21, 2014
Publication date	Aug 25, 2016
Grant date	—

Abstract

Related to is a detection circuit, a liquid crystal display panel and a method for manufacturing the liquid crystal display panel. The detection circuit comprises a control switch unit, which is arranged between a test signal input terminal and a signal line of the liquid crystal display panel, and includes a first switch transistor and a second switch transistor connected in series. During test, the first switch transistor and the second switch transistor is kept on, so that a test signal is transmitted to the signal line of the liquid crystal display panel; after completion of the test, the second switch transistor is kept off, and a control terminal of the first switch transistor is in shorted connection with its first terminal, so as to reduce leakage current flowing into the signal line of the liquid crystal display panel through the second switch transistor. The liquid crystal display panel provided with this detection circuit can effectively reduce the risk of electric leakage without affecting its normal operation, thus ensuring the quality of the image display.

First claim

1 . A detection circuit for detecting a liquid crystal display panel having a plurality of signal lines, comprising:
a test signal input terminal; and a control switch unit, arranged between the test signal input terminal and a signal line of the liquid crystal display panel, and including a first switch transistor and a second switch transistor connected in series, wherein during test, the first switch transistor and the second switch transistor are kept on, so that a test signal is transmitted to the signal line of the liquid crystal display panel; and after completion of the test, the second switch transistor is kept off, and a control terminal of the first switch transistor is in shorted connection with its first terminal, so as to reduce leakage current flowing into the signal line of the liquid crystal display panel through the second switch transistor.

2 . A detection circuit of claim 1 , wherein
the first terminal of said first switch transistor is electrically connected to the test signal input terminal, and a second terminal thereof is electrically connected to a first terminal of the second switch transistor, a second terminal of which is electrically connected to the signal line of the liquid crystal display panel, and control terminals of the first switch transistor and the second switch transistor are electrically connected, respectively, to a first control signal input terminal and a second control signal input terminal; and during the test, the control terminals of the first switch transistor and the second switch transistor receive, respectively, high-level control signals through the first control signal input terminal and the second control signal input terminal, and are thereby turned on; and after completion of the test, the control terminal of the second switch transistor receives a low-level control signal through the second control signal input terminal and is thereby turned off.

3 . A detection circuit of claim 1 , wherein
after an array substrate is bonded with a color filter substrate, the control terminal of the first switch transistor and its first terminal form a shorted connection therebetween by means of a wire arranged on the color filter substrate.

4 . A detection circuit of claim 2 , wherein
after an array substrate is bonded with a color filter substrate, the control terminal of the first switch transistor and its first terminal form a shorted connection therebetween by means of a wire arranged on the color filter substrate.

5 . A detection circuit of claim 1 , wherein
the first switch transistor and said second switch transistor are thin film transistors.

6 . A detection circuit of claim 1 , wherein
the test signal input terminal is suspended after completion of test, and a voltage thereof is a floating voltage.

7 . A detection circuit of claim 2 , wherein
the test signal input terminal is suspended after completion of the test, and a voltage thereof is a floating voltage.

8 . A detection circuit of claim 3 , wherein
the signal line is a scan line or a data line on the array substrate of the liquid crystal display panel.

9 . A detection circuit of claim 4 , wherein
the test signal input terminal is suspended after completion of the test, and a voltage thereof is a floating voltage.

10 . A liquid crystal display panel, comprising:
an array substrate, which comprises:
a display area, provided with a plurality of pixel regions formed by a plurality of signal lines arranged in a staggered manner, wherein each of the pixel regions is provided with a pixel unit including at least one thin film transistor, and the thin film transistor is electrically connected to the signal line and operates based on a voltage signal from the signal line; and
a non-display area, provided with a detection circuit for detecting the signal lines in the display area, wherein the detection circuit comprises:
a test signal input terminal; and
a control switch unit, arranged between the test signal input terminal and a signal line of the liquid crystal display panel, and including a first switch transistor and a second switch transistor connected in series, wherein during test, the first switch transistor and the second switch transistor are kept on, so that a test signal is transmitted to the signal line of the liquid crystal display panel; and after completion of the test, the second switch transistor is kept off, and a control terminal of the first switch transistor is in shorted connection with its first terminal, so as to reduce leakage current flowing into the signal line of the liquid crystal display panel through the second switch transistor.

11 . A liquid crystal display panel of claim 10 , wherein
the first terminal of said first switch transistor is electrically connected to the test signal input terminal, and a second terminal thereof is electrically connected to a first terminal of the second switch transistor, a second terminal of which is electrically connected to the signal line of the liquid crystal display panel, and control terminals of the first switch transistor and the second switch transistor are electrically connected, respectively, to a first control signal input terminal and a second control signal input terminal; and during the test, the control terminals of the first switch transistor and the second switch transistor receive, respectively, high-level control signals through the first control signal input terminal and the second control signal input terminal, and are thereby turned on; and after completion of the test, the control terminal of the second switch transistor receives a low-level control signal through the second control signal input terminal and is thereby turned off.

12 . A liquid crystal display panel of claim 10 , further comprising:
a color filter substrate, on which a wire connecting, after the color filter substrate is bonded with the array substrate, a control terminal of a first control switch in said detection circuit in shorted connection with its first terminal is provided.

13 . A liquid crystal display panel of claim 11 , further comprising:
a color filter substrate, on which a wire connecting, after the color filter substrate is bonded with the array substrate, a control terminal of a first control switch in said detection circuit in shorted connection with its first terminal is provided.

14 . A liquid crystal display panel of claim 10 , wherein
the test signal input terminal is suspended after completion of the test, and a voltage thereof is a floating voltage.

15 . A liquid crystal display panel of claim 11 , wherein
the test signal input terminal is suspended after completion of the test, and a voltage thereof is a floating voltage.

16 . A liquid crystal display panel of claim 12 , wherein
the test signal input terminal is suspended after completion of the test, and a voltage thereof is a floating voltage.

17 . A method for manufacturing a liquid crystal display panel, comprising the steps of:
arranging, in a display area of an array substrate, a plurality of signal lines to form a plurality of pixel regions in a staggered manner, wherein each of the pixel regions is provided with a pixel unit including at least one thin film transistor, and wherein the thin film transistor is electrically connected to a signal line and operates based on a voltage signal from the signal line; providing, in a non-display area of the array substrate, a detection circuit; and testing, by the detection circuit, the signal lines in the display area.

18 . A m

Assignees

• Shenzhen China Star Optoelect

Inventors

• Du Peng
• Shih Ming Hung

Classifications

• G02F1/133351

  Manufacturing of individual cells out of a plurality of cells, e.g. by dicing · CPC title

• G02F1/133514

  Colour filters · CPC title

• G02F2203/69

  Arrangements or methods for testing or calibrating a device · CPC title

• G02F1/1309 Primary

  Repairing; Testing · CPC title

• G02F1/136286 Primary

  Wiring, e.g. gate line, drain line · CPC title