Board terminal and board connector

US2016240950A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016240950-A1
Application numberUS-201415030072-A
CountryUS
Kind codeA1
Filing dateOct 22, 2014
Priority dateNov 11, 2013
Publication dateAug 18, 2016
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A board terminal 1 includes a base material 11 made of a metal material and a plating film 12 covering a surface of the base material 11. The plating film 12 includes an outermost layer 120 having a Sn mother phase 120 a and Sn—Pd-based alloy phases 120 b dispersed in the Sn mother phase 120 a, the Sn mother phase 120 a and the Sn—Pd-based alloy phases 120 b being present on an outer surface. A Pd content in the outermost layer 120 is not more than 7 atomic %. A board connector 2 includes the board terminal 1 and a housing 20 for holding the board terminal 1.

First claim

Opening claim text (preview).

1 . A board terminal, comprising: a base material made of a metal material; and a plating film covering a surface of the base material; wherein: the plating film includes an outermost layer having a Sn mother phase and Sn—Pd-based alloy phases dispersed in the Sn mother phase, the Sn mother phase and the Sn—Pd-based alloy phases being present on an outer surface; the outermost layer is formed by performing a reflow process after a Pd plating layer having a thickness of not smaller than 10 nm and smaller than 20 nm and a Sn plating layer having a thickness of not smaller than 1 μm and not larger than 2 μm are successively formed, the outermost layer has a Pd content of not more than 7 atomic %, and the outermost layer is in contact with an inner layer having a double layer structure composed of a Ni layer in contact with the base material and a Ni—Sn alloy layer in contact with the Ni layer or is in contact with the base material. 2 . A board terminal according to claim 1 , wherein: the base material has a fracture surface formed during processing into a terminal shape; and the plating film covers the surface of the base material including the fracture surface. 3 . A board terminal according to claim 1 , wherein the base material is Cu or Cu alloy. 4 . A board terminal according to claim 1 , wherein an area ratio of the Sn—Pd alloy phases occupying the outer surface of the outermost layer is not less than 10% and not more than 80%. 5 . A board connector, comprising: a board terminal according to claim 1 ; and a housing for holding the board terminal. 6 . A board connector according to claim 5 , wherein the board terminal is used by being mounted on a printed circuit board by solder bonding. 7 . A board terminal manufacturing method, comprising: a step of forming a plating film covering a surface of a base material made of a metal material by performing a reflow process after a Pd plating layer having a thickness of not smaller than 10 nm and smaller than 20 nm and a Sn plating layer having a thickness of not smaller than 1 μm and not larger than 2 μm are successively formed on the surface of the base material or forming a plating film covering the surface of the base material by successively forming the Pd plating layer and the Sn plating layer on the surface of the base material and performing the reflow process, wherein: the plating film includes an outermost layer having a Sn mother phase and Sn—Pd-based alloy phases dispersed in the Sn mother phase, the Sn mother phase and the Sn—Pd-based alloy phases being present on an outer surface, the outermost layer has a Pd content of not more than 7 atomic %, the outermost layer is in contact with an inner layer having a double layer structure composed of a Ni layer in contact with the base material and a Ni—Sn alloy layer in contact with the Ni layer or is in contact with the base material. 8 . A board terminal manufacturing method according to claim 7 , wherein: the base material has a fracture surface formed during processing into a terminal shape; and the plating film covers the surface of the base material including the fracture surface. 9 . A board terminal manufacturing method according to claim 7 , wherein the base material is Cu or Cu alloy.

Assignees

Inventors

Classifications

  • for manufacturing contact members, e.g. by punching and by bending · CPC title

  • Four or more poles · CPC title

  • H01R13/03Primary

    characterised by the material, e.g. plating, or coating materials · CPC title

  • Coupling device provided on the PCB · CPC title

  • Electroplating characterised by the article coated · CPC title

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Frequently asked questions

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What does patent US2016240950A1 cover?
A board terminal 1 includes a base material 11 made of a metal material and a plating film 12 covering a surface of the base material 11. The plating film 12 includes an outermost layer 120 having a Sn mother phase 120 a and Sn—Pd-based alloy phases 120 b dispersed in the Sn mother phase 120 a, the Sn mother phase 120 a and the Sn—Pd-based alloy phases 120 b bein…
Who is the assignee on this patent?
Autonetworks Technologies Ltd, Sumitomo Wiring Systems, Sumitomo Electric Industries
What technology area does this patent fall under?
Primary CPC classification H01R13/03. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 18 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).