Microstructured substrate

US2016240882A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2016240882-A1
Application numberUS-201415027065-A
CountryUS
Kind codeA1
Filing dateOct 2, 2014
Priority dateOct 7, 2013
Publication dateAug 18, 2016
Grant date

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A microstructured substrate includes a plurality of at least one elementary microstructure. An electrical storage device, and more particularly an all-solid-state battery, can include the microstructured substrate.

First claim

Opening claim text (preview).

1 . Microstructured substrate comprising: a plurality of at least one elementary microstructure, wherein said at least one elementary microstructure, on the one hand, has an elongate shape and lower and upper opposite longitudinal ends, the lower end being connected to the substrate and, on the other hand, includes an open cavity at its upper end, said microstructured substrate having alumina on its surface. 2 . Substrate according to claim 1 , wherein the elementary microstructure has a circular, elliptical, rectangular, square or triangular transverse cross section. 3 . Substrate according to claim 1 , wherein the elementary microstructure has a longitudinal dimension d L between 5 and 200 μm and a transverse dimension OD between 2 and 10 μm. 4 . Substrate according claim 1 , wherein the elementary microstructures of the substrate are arranged periodically over said substrate. 5 . Substrate according to claim 4 , wherein the elementary microstructures of the substrate have a spatial period SP between 3 and 10 μm. 6 . Substrate according to claim 1 , wherein the open cavity of each of the elementary microstructures extends longitudinally inside said elementary microstructure. 7 . Substrate according to claim 1 , wherein the elementary microstructure has an aspect ratio r asp higher than or equal to 10. 8 . Substrate according to claim 1 , wherein said substrate is made from a material chosen from silicon, silicon dioxide, gallium arsenide, silicon nitride and indium phosphide. 9 . Process for obtaining a microstructured substrate according to claim 1 by microstructuring a substrate having a planar surface, said process comprising the steps of: a) coating a photoresist layer onto the planar surface of said substrate, b) producing by photolithography a repetition of at least one elementary pattern in the photoresist layer in order that the surface of the substrate presents zones exempt from photoresist, c) etching the zones of the surface of the substrate exempt from photoresist, d) passivating the surface of the substrate, e) repeating said etching and passivating steps c) and d) in order to obtain said microstructured substrate, and, subsequently to the repeating step e), a step of depositing alumina on the surface of the microstructured substrate. 10 . Process according to claim 9 , wherein the elementary pattern obtained in the photolithography step b) has an annular shape the dimensions of which coincide with the transverse dimensions (SP, FP, ID) of the elementary microstructure ( 3 ). 11 . Process according to claim 9 , wherein the etching and passivating steps c) and d) are carried out by way of an ionized gas. 12 . The microstructured substrate as defined in claim 1 , wherein said microstructured substrate is configured for application within a device for storing electrical energy. 13 . Device for storing electrical energy including at least: a substrate, a negative electrode and a positive electrode, one of which is placed on the substrate, and an electrolyte placed between the negative electrode and the positive electrode, wherein the substrate is a microstructured substrate according to claim 1 . 14 . Device according to claim 13 , wherein said device further comprises a first current collector placed on the substrate and a second current collector, the negative electrode and the positive electrode being placed between the first and second current collectors. 15 . Device according to claim 14 , wherein the substrate is made from a material chosen from silicon, silicon dioxide, gallium arsenide, silicon nitride and indium phosphide and in that the current collectors are made from solid materials chosen from aluminium, copper, platinum and titanium nitride. 16 . Device for storing electrical energy according to claim 13 , wherein the negative electrode, the positive electrode and the electrolyte each take the form of a thin layer.

Assignees

Inventors

Classifications

  • Tips, pillars · CPC title

  • Bosch process · CPC title

  • of accumulators having only flat construction elements, i.e. flat positive electrodes, flat negative electrodes and flat separators · CPC title

  • Cavities · CPC title

  • H01M10/02Primary

    Details (of electrodes H01M4/00; of non-active parts H01M50/00) · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US2016240882A1 cover?
A microstructured substrate includes a plurality of at least one elementary microstructure. An electrical storage device, and more particularly an all-solid-state battery, can include the microstructured substrate.
Who is the assignee on this patent?
Centre Nat Rech Scient, Univ Nantes
What technology area does this patent fall under?
Primary CPC classification H01M10/02. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Aug 18 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).