Array substrate and manufacturing method thereof
US-12185597-B2 · Dec 31, 2024 · US
US2016233291A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016233291-A1 |
| Application number | US-201615132864-A |
| Country | US |
| Kind code | A1 |
| Filing date | Apr 19, 2016 |
| Priority date | Aug 14, 2014 |
| Publication date | Aug 11, 2016 |
| Grant date | — |
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A method of preparing a display device including a plurality of pixels where a plurality of gate lines cross a plurality of data lines, respectively, each of the pixels including a thin film transistor (TFT) region and a display region, the method can include: forming a thin film transistor (TFT) in the TFT region; and forming a light emitting element for displaying images based on signals from the TFT in the display region, in which a metallic layer is disposed in the TFT region for electrical connection of the TFT; and a light absorbing layer configured to absorb at least part of light propagating toward the metallic layer is disposed on the metallic layer between the metallic layer and one of a gate insulating layer, an active layer, an interlayer dielectric layer and a substrate.
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What is claimed is: 1 . A method of preparing a display device including a plurality of pixels where a plurality of gate lines cross a plurality of data lines, respectively, each of the pixels including a thin film transistor (TFT) region and a display region, the method comprising: forming a thin film transistor (TFT) in the TFT region; and forming a light emitting element for displaying images based on signals from the TFT in the display region, wherein a metallic layer is disposed in the TFT region for electrical connection of the TFT, and wherein a light absorbing layer configured to absorb at least part of light propagating toward the metallic layer is disposed on the metallic layer between the metallic layer and one of a gate insulating layer, an active layer, an interlayer dielectric layer and a substrate. 2 . The method of claim 1 , wherein the metallic layer is a gate electrode of the TFT. 3 . The method of claim 1 , wherein the metallic layer is at least one of source and drain electrodes of the TFT. 4 . The method of claim 1 , wherein the metallic layer is a light shield layer disposed between the TFT and the light absorbing layer. 5 . The method of claim 1 , wherein a phase compensation layer configured to adjust a phase of the light is disposed on the light absorbing layer, and wherein the light absorbing layer is disposed between the gate electrode and a gate insulation layer of the TFT. 6 . The method of claim 1 , wherein the metallic layer and the light absorbing layer are formed using a same mask. 7 . The method of claim 5 , wherein the metallic layer, the light absorbing layer, and the phase compensation layer are formed using a same mask. 8 . A method of preparing a display device including a plurality of pixels where a plurality of gate lines cross a plurality of data lines, respectively, each of the pixels including a thin film transistor (TFT) region and a display region, the method comprising: forming a thin film transistor (TFT) in the TFT region; and forming a light emitting element for displaying images based on signals from the TFT in the display region, wherein a metallic layer is disposed in the TFT region for electrical connection of the TFT, wherein a light absorbing layer is disposed on the metallic layer and configured to absorb at least part of light propagating toward the metallic layer, and wherein the metallic layer and the light absorbing layer are formed using a same mask pattern. 9 . The method of claim 8 , wherein the metallic layer is one of a gate electrode of the TFT, and a light shield layer disposed between the TFT and the light absorbing layer. 10 . The method of claim 8 , wherein the metallic layer is at least one of source and drain electrodes of the TFT, or is an electric connection wire or electrode of the TFT. 11 . The method of claim 8 , wherein the metallic layer is a light shield layer disposed between the TFT and the light absorbing layer. 12 . The method of claim 8 , further comprising a phase compensation layer configured to adjust a phase of the light propagating toward the metallic layer and disposed on the light absorbing layer. 13 . The method of claim 8 , wherein the light absorbing layer includes two or more of a copper oxide, a nickel oxide, a molybdenum oxide, and copper/nickel/molybdenum. 14 . The method of claim 12 , wherein the phase compensation layer includes at least one of SiN, IGZO, and ITO. 15 . The method of claim 12 , wherein the metallic layer, the light absorbing layer, and the phase compensation layer are formed using a same mask. 16 . A method of preparing a display device including a plurality of pixels where a plurality of gate lines cross a plurality of data lines, respectively, each of the pixels including a thin film transistor (TFT) region and a display region, the method comprising: forming a thin film transistor (TFT) in the TFT region; and forming a light emitting element for displaying images based on signals from the TFT in the display region, wherein a metallic layer is disposed in the TFT region for electrical connection of the TFT, wherein a light absorbing layer is disposed on the metallic layer and configured to absorb at least part of light propagating toward the metallic layer, and wherein a phase compensation layer is configured to adjust a phase of the light propagating toward the metallic layer and disposed on the light absorbing layer. 17 . The method of claim 16 , wherein the metallic layer is a gate electrode of the TFT, at least one of source and drain electrodes of the TFT, or a light shield layer disposed between the TFT and the light absorbing layer. 18 . The method of claim 16 , wherein the phase compensation layer includes at least one of SiN, IGZO, and ITO. 19 . The method of claim 18 , wherein a thickness of the phase compensation layer is proportional to a wavelength of the light and is inversely proportional to a refractive index of the light absorbing layer. 20 . The method of claim 16 , wherein the metallic layer, the light absorbing layer, and the phase compensation layer are formed using a same mask.
of interconnections · CPC title
Two-dimensional arrangements, e.g. asymmetric LED layout · CPC title
Manufacture or treatment · CPC title
wherein the TFTs are in active matrices · CPC title
Interconnections, e.g. scanning lines · CPC title
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