Display Device

Patent metadata

Field	Value
Publication number	US-2016233251-A1
Application number	US-201615012306-A
Country	US
Kind code	A1
Filing date	Feb 1, 2016
Priority date	Feb 9, 2015
Publication date	Aug 11, 2016
Grant date	—

Abstract

A display device includes a first electrode, a first insulating layer having a first top surface and a first side wall, the first side wall having a closed shape and being exposed to a first opening reaching the first electrode, an oxide semiconductor layer on the first side wall, the oxide semiconductor layer including a first portion and a second portion, the first portion being connected with the first electrode, a gate electrode facing the oxide semiconductor layer, a gate insulating layer between the oxide semiconductor layer and the gate electrode, a first transparent conductive layer above the first top surface, the first transparent conductive layer being connected with the second portion, and a second transparent conductive layer connected with the first transparent conductive layer, the second transparent conductive layer forming the same layer with the first transparent conductive layer.

First claim

What is claimed is:

1 . A display device, comprising:
a first electrode; a first insulating layer having a first top surface and a first side wall, the first side wall having a closed shape and being exposed to a first opening reaching the first electrode; an oxide semiconductor layer on the first side wall, the oxide semiconductor layer including a first portion and a second portion, the first portion being connected with the first electrode; a gate electrode facing the oxide semiconductor layer; a gate insulating layer between the oxide semiconductor layer and the gate electrode; a first transparent conductive layer above the first top surface, the first transparent conductive layer being connected with the second portion; and a second transparent conductive layer connected with the first transparent conductive layer, the second transparent conductive layer forming the same layer with the first transparent conductive layer.

2 . The display device according to claim 1 , wherein the second transparent conductive layer is a pixel electrode to be supplied with a data signal corresponding to a gray scale of a pixel including the second transparent conductive layer.

3 . The display device according to claim 2 , further comprising:
a fourth transparent conductive layer in a region different from that of at least the second transparent conductive layer as seen in a plan view, the fourth transparent conductive layer being supplied with a voltage different from that of the second transparent conductive layer; and a second insulating layer between the second transparent conductive layer and the fourth transparent conductive layer.

4 . The display device according to claim 2 , further comprising a third transparent conductive layer forming the same layer with the first transparent conductive layer and the second transparent conductive layer, the third transparent conductive layer facing the second transparent conductive layer as seen in a plan view and being supplied with a voltage different from that of the second transparent conductive layer

5 . The display device according to claim 3 , further comprising:
a gate line to be supplied with a gate voltage controlling a transistor including a channel formed of the oxide semiconductor layer to be on or off; and a data line to be supplied with the data signal; wherein: the gate line is connected with the gate electrode; the data line is connected with the first electrode; and the transistor is located in a crossing area of the gate line and the data line.

6 . The display device according to claim 5 , wherein the first side wall has a tapered inclining surface tending to open upward.

7 . The display device according to claim 4 , further comprising:
a gate line to be supplied with a gate voltage controlling a transistor including a channel formed of the oxide semiconductor layer to be on or off; and a data line to be supplied with the data signal; wherein: the gate line is connected with the gate electrode; the data line is connected with the first electrode; and the transistor is located in a crossing area of the gate line and the data line.

8 . The display device according to claim 7 , wherein the first side wall has a tapered inclining surface tending to open upward.

9 . A display device, comprising:
a first electrode; a first insulating layer having a first top surface and a first side wall, the first side wall having a closed shape and being exposed to a first opening reaching the first electrode; an oxide semiconductor layer on the first side wall, the oxide semiconductor layer including a first portion and a second portion, the first portion being connected with the first electrode; a gate electrode facing the oxide semiconductor layer; a gate insulating layer between the oxide semiconductor layer and the gate electrode; a first transparent conductive layer above the first top surface, the first transparent conductive layer being connected with the second portion; and a second transparent conductive layer connected with the first electrode, the second transparent conductive layer forming the same layer with the first transparent conductive layer.

10 . The display device according to claim 9 , wherein the second transparent conductive layer is a pixel electrode to be supplied with a data signal corresponding to a gray scale of a pixel including the second transparent conductive layer.

11 . The display device according to claim 10 , further comprising:
a second electrode connected with the oxide semiconductor layer or the first transparent conductive layer; and a second insulating layer between the oxide semiconductor layer and the second electrode or between the first transparent conductive layer and the second electrode.

12 . The display device according to claim 11 , further comprising a fourth transparent conductive layer on the second insulating layer in a region different from that of at least the second transparent conductive layer as seen in a plan view, the fourth transparent conductive layer being supplied with a voltage different from that of the second transparent conductive layer.

13 . The display device according to claim 12 , further comprising:
a gate line to be supplied with a gate voltage controlling a transistor including a channel formed of the oxide semiconductor layer to be on or off; and a data line to be supplied with the data signal; wherein: the gate line is connected with the gate electrode; the data line is connected with the second electrode; and the transistor is located in a crossing area of the gate line and the data line.

14 . The display device according to claim 13 , wherein the first side wall has a tapered inclining surface tending to open upward.

15 . The display device according to claim 10 , further comprising a third transparent conductive layer forming the same layer with the first transparent conductive layer and the second transparent conductive layer, the third transparent conductive layer facing the second transparent conductive layer as seen in a plan view and being supplied with a voltage different from that of the second transparent conductive layer.

16 . The display device according to claim 15 , further comprising:
a gate line to be supplied with a gate voltage controlling a transistor including a channel formed of the oxide semiconductor layer to be on or off; and a data line to be supplied with the data signal; wherein: the gate line is connected with the gate electrode; the data line is connected with the first transparent conductive layer; and the transistor is located in a crossing area of the gate line and the data line.

17 . The display device according to claim 16 , wherein the first side wall has a tapered inclining surface tending to open upward.

Assignees

• Japan Display Inc

Inventors

• Sasaki Toshinari

Classifications

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D30/6757

  characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile (TFTs having channel structures for preventing kink or snapback effects H10D30/6708; TFTs having lightly-doped source or drain extensions H10D30/6715) · CPC title

• H10D30/6755

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H10D30/6729

  characterised by the electrodes · CPC title

• H10D30/6728

  Vertical TFTs · CPC title