Semiconductor devices having a seal ring
US-2024413245-A1 · Dec 12, 2024 · US
US2016233229A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2016233229-A1 |
| Application number | US-201514833801-A |
| Country | US |
| Kind code | A1 |
| Filing date | Aug 24, 2015 |
| Priority date | Feb 5, 2015 |
| Publication date | Aug 11, 2016 |
| Grant date | — |
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A 3D nonvolatile memory device is disclosed. The 3D nonvolatile memory device includes a word line stack in which a plurality of word lines are stacked therein and includes a cell region and a slimming region, and pass transistors located below the word line stack, and electrically coupled to the slimming region. A width of the slimming region is larger than that of the cell region.
Opening claim text (preview).
1 - 4 . (canceled) 5 . A three-dimensional (3D) nonvolatile memory device comprising: a first word line stack including a plurality of first word lines and extending from a first cell region to a first slimming region; and a second word line stack including a plurality of second word lines and extending from a second cell region to a second slimming region, wherein each of the first slimming region and the second slimming region are in a stepped form, and wherein the first slimming region and the second slimming region face each other. 6 . The 3D nonvolatile memory device of claim 5 , further comprising: first pass transistors located below the first word line stack and electrically coupled to the plurality of first word lines in the first slimming region; and second pass transistors located below the second word line stack, and electrically coupled to the plurality of second word lines in the second slimming region. 7 . The 3D nonvolatile memory device of claim 6 , further comprising: a slit region between the first word line stack and the second word line stack; and contact plugs located in the slit region and configured to electrically couple the plurality of first word lines in the first slimming region to the first pass transistors and electrically couple the plurality of second word lines in the second slimming region to the second pass transistors. 8 . The 3D nonvolatile memory device of claim 5 , wherein the first slimming region is in a stepped form, wherein the first word line stack is inclined in a right downward direction, wherein the second slimming region is in a stepped form, and wherein the second word line stack is inclined in a right upward direction. 9 . The 3D nonvolatile memory device of claim 5 , wherein a width of the first slimming region is larger than a width of the first cell region, and a width of the second slimming region is larger than a width of the second cell region. 10 . A three-dimensional (3D) nonvolatile memory device comprising: a cell region and a slimming region, wherein the sliming region is formed at one side of the cell region; a first word line stack including a plurality of first word lines and extending from the cell region to the slimming region along a first direction; a second word line stack including a plurality of second word lines and extending from the cell region to the slimming region along the first direction; a first opening formed in the sliming region and exposing the plurality of first word lines, wherein the plurality of first word lines exposed by the first opening has a stepped structure; and a second opening formed in the sliming region and exposing the plurality of second word lines, wherein the plurality of second word lines exposed by the second opening has a stepped structure, wherein the second word line stack in the slimming region is interlocked with the first word line in the slimming region, and wherein the first and the second openings are arranged side by side along the first direction. 11 . The three-dimensional (3D) nonvolatile memory device of claim 10 , wherein the first word line stack in the cell region is located at a first row, wherein the second word line stack in the cell region is located at a second row, wherein the first row and the second row are arranged in a second direction perpendicular to the first direction, wherein the first word line stack in the slimming region protrudes from the first row and extends to the second row along the second direction, and wherein the second word line stack in the slimming region protrudes from the second row and extends to the first row along the second direction.
Layouts of interconnections · CPC title
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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