Composite protection circuit, composite protection element, and led device for illumination

Patent metadata

Field	Value
Publication number	US-2016233201-A1
Application number	US-201615134607-A
Country	US
Kind code	A1
Filing date	Apr 21, 2016
Priority date	Oct 24, 2013
Publication date	Aug 11, 2016
Grant date	—

Abstract

A Zener diode used as an ESD protection element is connected in parallel to a circuit to be protected, for example an LED chip. The Zener diode is connected in parallel to an antifuse element. For example, an LED package (P 1 -Pn) includes the LED chip and a composite protection element connected in parallel thereto. The composite protection element includes the Zener diode and antifuse element. The Zener diode is formed in a semiconductor substrate, and the antifuse element is formed in a wiring layer on the semiconductor substrate.

First claim

1 . A combination, comprising
a circuit to be protected; and a composite protection element including an electrostatic discharge protection element connected in parallel to the circuit to be protected and an antifuse element connected in parallel to the electrostatic discharge protection element.

2 . The combination of claim 1 , wherein the electrostatic discharge protection element and the antifuse element are configured on a single chip.

3 . The combination of claim 2 , wherein the chip is a semiconductor substrate, the electrostatic discharge protection element is a Zener diode formed in the semiconductor substrate, and the antifuse element is formed in a wiring layer located on a surface of the semiconductor substrate.

4 . The combination of claim 3 , wherein the antifuse element has a multilayer structure in which an insulation layer is disposed between electrode layers.

5 . The combination of claim 4 , wherein the circuit to be protected is an LED chip for illumination.

6 . The combination of claim 1 , wherein the circuit to be protected is an LED chip for illumination and the composite protection element and the LED chip are housed in a single package.

7 . A composite protection element, comprising
an electrostatic discharge protection element; and an antifuse element connected in parallel to the electrostatic discharge protection element, the electrostatic discharge protection element and the antifuse element being formed in a single chip.

8 . The composite protection element of claim 7 , wherein the chip is a semiconductor substrate, the electrostatic discharge protection element is a Zener diode formed in the semiconductor substrate, and the antifuse element is formed in a wiring layer located on a surface of the semiconductor substrate.

9 . The composite protection element of claim 8 , wherein the antifuse element has a multilayer structure in which an insulation layer is disposed between electrode layers.

10 . The composite protection element of claim 9 , wherein:
the composite protection element has opposed front and a rear surfaces; and the composite protection element further comprises first and second electrodes located on the front surface, the first and second electrodes being electrically coupled to respective electrodes of the antifuse layer.

11 . The composite protection element of claim 9 , wherein:
the composite protection element has opposed front and a rear surfaces; and the composite protection element further comprises first and second electrodes located on the front and rear surfaces, respectively, the first and second electrodes being coupled to respective electrodes of the antifuse layer.

12 . A combination, comprising:
a circuit to be protected; a lead frame; and a composite protection element electrically coupled to the lead frame, the composite protection element including an electrostatic discharge protection element connected in parallel to the circuit to be protected and an antifuse element connected in parallel to the electrostatic discharge protection element.

13 . The combination of claim 12 , wherein the antifuse element has a multilayer structure in which an insulation layer is disposed between electrode layers.

14 . The combination of claim 13 , wherein:
the composite protection element has opposed front and a rear surfaces; and the composite protection element further comprises first and second electrodes located on the front and rear surfaces, respectively, the first and second electrodes being coupled to respective electrodes of the antifuse layer.

15 . The combination of claim 14 , wherein the first electrode is electrically coupled to the lead frame by a single wire and the second electrode is directly coupled to the lead frame without the use of a wire.

Assignees

• Murata Manufacturing Co

Inventors

• Sakai Nobuo

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W20/491

  Antifuses, i.e. interconnections changeable from non-conductive to conductive · CPC title

• H10W90/00 Primary

  Package configurations · CPC title

• H10D89/611

  using diodes as protective elements · CPC title

• H10D89/60

  Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] · CPC title